This 2 day course offers coverage of Digital Signal Controller (DSC) core architecture with emphasis on the system internal buses and memory maps covering the major concept of the dual-Harvard Architecture. It covers the major functional blocks and explains how the DSC core performs multi-memory accesses while executing the powerful MAC instructions. After discussing the core architecture, a deep dive into the programmer’s model, the powerful addressing modes and instruction set are also covered with some DSP program examples. Also included are details of all on-chip peripherals such as Interrupt Controller, Analog Comparators, analog-to-digital converter, system timers, internal clock generation and distribution and other on-chip peripherals.
Prerequisite: Knowledge/experience of some microprocessor/microcontroller is necessary.
COURSE OUTLINE
Day 1
DSP56F800 Overview
- Main Features and Road Map
- System Architecture
- Memory Maps and Internal buses
- Core and Programming Model
- Addressing Modes and Instruction Set
- Core Functional Blocks
- DSC Exceptions, Interrupts &Fast Interrupt processing and handling
- Interrupt Controller
- System Clock Generation
Day 2
DSC Peripherals
- System timers and application examples
- Programmable Gain Amplifiers
- Analog Comparators
- Analog-to-digital converter (ADC)
- Digital-to-analog converter
- Programmable delay blocks
- Serial interfaces (SCI, QSCI, SPI, QSPI, and msCAN)
WHAT YOU'LL LEARN
Participants will understand the basic concepts of the DSC core and its major functional blocks