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  • Author Author: atomar
  • Date Created: 1 Jun 2012 2:33 AM Date Created
  • Last Updated Last Updated: 26 Jun 2012 6:00 PM
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ARM Cortex-M0 Overview

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Cortex-M0 Overview

 

The ARM CortexTm-M0 processor is the smallest, lowest power and most energy-efficient ARM processor available.  The exceptionally small silicon area, low power and minimal code footprint of the processor enables developers to achieve 32-bit performance at an 8-bit price point, bypassing the step to 16-bit devices. The ultra low gate count of the Cortex-M0 processor also enables it to be deployed in analog and mixed signal devices

 

The lowest power, smallest ARM processor

The code density and energy efficiency benefits of Cortex-M0 mean that it is a natural and cost effective successor to 8/16-bit devices in a wide variety of applications, while retaining tool and binary upwards compatibility with the feature-rich Cortex-M3 processor.

 

Ultra low power

The Cortex-M0 processor, which consumes as little as 3 µW/MHz (0.003 mW) in an area of under 12 K gates, builds on the unrivalled expertise of ARM as a leader in low-power technology and a key enabler for the creation of ultra low-power devices.

 

Simplicity

With just 56 instructions it is possible to quickly master the entire Cortex-M0 instruction set if desired; but its C friendly architecture means this is not a necessity. The option for fully deterministic instruction and interrupt timing makes it easy to calculate response times.

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Optimized connectivity

Designed to support low power connectivity such as Bluetooth Low Energy (BLE), IEEE 802.15 and Z-wave, particularly in analog devices which are increasing their digital functionality to pre-process and communicate data efficiently.

 

 

ARM Cortex-M0 Features

ISA Support

ThumbRegistered / Thumb-2 subset

Pipeline

3-stage

Performance Efficiency

1.62 CoreMark/MHz - 0.9 DMIPS/MHz

Interrupts

Non-maskable Interrupt (NMI) + 1 to 32 physical interrupts

Sleep Modes

Integrated WFI and WFE Instructions and Sleep On Exit capability.

Sleep & Deep Sleep Signals.

Optional Retention Mode with ARM Power Management Kit

Bit Manipulation

Bit banding region can be implemented with Cortex-M System Design Kit

Enhanced Instructions

Hardware single-cycle (32x32) multiply option

Debug

Optional JTAG & Serial-Wire Debug Ports. Up to 4 Breakpoints and 2 Watchpoints

 

 

 

 

 

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