Introduction to the Analog Discovery Pro 5000 Series

Digilent has recently expanded their test equipment lineup with two powerful new oscilloscopes—the ADP5470  and ADP5490 . These four-channel mixed-signal oscilloscopes offer substantially higher bandwidths and sample rates than any previous Digilent oscilloscope. In this article, we will demonstrate how these enhanced capabilities can be leveraged for advanced FPGA testing applications.

Understanding FPGA Pin Speed Limitations

A critical question in FPGA design concerns the maximum toggle frequency of pins—a factor that directly determines data transfer capabilities. This maximum speed is influenced by several variables:

• PCB trace lengths between connectors and FPGA pins
• Presence or absence of current-limiting protection resistors
• Connector quality and inherent limitations

While Pmod connectors are convenient and developer-friendly compared to alternatives like SYZYGY or FMC, they do impose certain speed constraints on signals passing through them.

Our Experimental Setup

We developed a custom project that toggles the Pmod I/O pins on an Arty S7  at configurable frequencies. This was accomplished by exposing Clocking Wizard register settings through a command interface connected to a serial port. Using this approach, we could control the serial port from a Python script to consistently configure clock settings while simultaneously recording the resulting clock pulses with the ADP5490.

For readers interested in the details of the FPGA configuration, we covered this topic comprehensively in our earlier post: "VCOs, MMCMs, PLLs, and CMTs – Clocking Resources on FPGA Boards." This current article focuses primarily on the capabilities of the ADP5000 devices.

Digital Signal Requirements and Testing Methodology

For proper transmission between devices, digital signals must meet specific voltage thresholds. In the case of 3.3V LVCMOS logic (commonly used on our FPGA boards), a valid rising edge requires a signal transition from below 0.4V to above 2.4V.

These thresholds are documented in Table 8 (SelectIO DC Input and Output Levels) of DS189, Spartan 7 AC/DC Switching Characteristics. It's worth noting that these specifications are defined for DC signals, and their applicability to rapidly toggling pins depends on the board's analog characteristics—precisely what we aimed to test.

Results and Observations

Through progressive frequency testing with the oscilloscope, we determined the point at which LVCMOS33 voltage levels could no longer be maintained. WaveForms' cursors feature proved invaluable for quickly assessing whether signals crossed specific thresholds.

Phase Shift Testing at 10 MHz

We observed output signals with varying phase shifts relative to each other at 10 MHz. The expected shifts were approximately 0 degrees between channels C1 and C2, 45 degrees between C1 and C3, and 90 degrees between C1 and C4. Our measurements confirmed these were reasonably accurate.

Performance at 60 MHz

At 60 MHz, we noted that slew rates began to significantly impact signal quality, though threshold requirements were still being met. Harmonic frequencies remained present, albeit with reduced impact on square wave edge formation. The ADP5490's high bandwidth allowed us to capture multiple harmonics up to the 7th at 420 MHz.

Behavior at 75 MHz

Signal behavior became particularly interesting at 75 MHz. While the outputs managed to swing past the required thresholds, we observed unexpectedly high amplitude—possibly representing a smoothed-out overshoot condition.

Component Impact Analysis at 15 MHz

To understand how external components affect signal quality, we compared the JC1 and JA1 outputs at 15 MHz. One output included a series resistor while the other did not, revealing significant differences in signal characteristics. During this testing, we found the Scope to Digital feature especially useful, as it allows interpretation of analog signals in a logic analyzer-style view with adjustable thresholds.

The Importance of High-Bandwidth Oscilloscopes

Our previous oscilloscope, the AD3, though extremely useful for many FPGA debugging tasks, lacked sufficient bandwidth for this type of comprehensive testing. The FFT view of clock signals revealed the importance of capturing multiple harmonic frequencies to properly represent square waves as they would be interpreted by driven devices. An oscilloscope must capture frequencies many times higher than the base signal to provide accurate representation.

Important Considerations

We must emphasize that all testing was conducted with a specific board and project configuration, with no external circuits beyond the oscilloscope connected to the I/Os. Results will differ substantially once a Pmod is connected to a Pmod port, so actual performance may vary in practical applications.