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Documents Qorivva MPC564xL Family Fact Sheet - Safety with flexibility*
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  • Author Author: autoembedded
  • Date Created: 24 Aug 2012 4:44 PM Date Created
  • Last Updated Last Updated: 8 Oct 2021 5:11 AM
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Qorivva MPC564xL Family Fact Sheet - Safety with flexibility*

The Qorivva MPC564xL family of MCUs is part of the SafeAssure program and is designed to specifically address the required IEC61508 (SIL3) and ISO26262 (ASILD) safety standards. It reduces design complexity and component count by putting key functional safety features on a single chip with a dual-core, dual-issue architecture.

 

In lockstep mode it provides an environment for redundant processing and calculations. Common cause failure countermeasures targeting power, clock and error propagation are implemented to detect various failure modes.

 

image

 

The MPC564xL’s dual-core, dual-issue architecture can be statically switched from lockstep mode to decoupled parallel mode (independent core operation) for those applications needing maximum performance or software diversity. With dual-issue technology, the cores can process two instructions per clock cycle, enabling more performance and using less power.

 

The MPC564xL family is specifically designed to support actuator control applications for vehicle electrification. Enabled by the new crosstriggering unit, the device allows control of up to two brushless DC motors or multiple valves with only minimum interrupt load. Additional features include the fault collection unit, FlexRayTm protocol, two 12-bit ADCs, eTimer units and a built-in hardware self test.

 

View Full Fact Sheet here.

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