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Documents FeRAM (Ferroelectric Random Access Memory)
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  • Author Author: doctorcdf
  • Date Created: 13 Dec 2011 10:18 AM Date Created
  • Last Updated Last Updated: 13 Dec 2011 10:25 AM
  • Views 943 views
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Related
Recommended

FeRAM (Ferroelectric Random Access Memory)

MR44V064A

 

The MR44V064A is a nonvolatile 8,192-word x 8-bit ferroelectric random access memory (FeRAM) developed
in the ferroelectric process and silicon-gate CMOS technology. The MR44V064A is accessed using Two-wire
Serial Interface ( I2C BUS ).Unlike SRAMs, this device, whose cells are nonvolatile, eliminates battery backup
required to hold data. This device has no mechanisms of erasing and programming memory cells and blocks,
such as those used for various EEPROMs. Therefore, the write cycle time can be equal to the read cycle time and
the power consumption during a write can be reduced significantly. 
The MR44V064A can be used in various applications, because the device is guaranteed for the write/read
tolerance of 10
12
cycles per bit and the rewrite count can be extended significantly.

The MR44V064A is a nonvolatile 8,192-word x 8-bit ferroelectric random access memory (FeRAM) developed  in the ferroelectric process and silicon-gate CMOS technology. The MR44V064A is accessed using Two-wire  Serial Interface ( I2C BUS ).Unlike SRAMs, this device, whose cells are nonvolatile, eliminates battery backup  required to hold data. This device has no mechanisms of erasing and programming memory cells and blocks,  such as those used for various EEPROMs. Therefore, the write cycle time can be equal to the read cycle time and  the power consumption during a write can be reduced significantly. 

 

The MR44V064A can be used in various applications, because the device is guaranteed for the write/read tolerance of 10^12 cycles per bit and the rewrite count can be extended significantly.

 

MR44V064AMAZAABMR44V064AMAZAAB

 

MR45V256A

 

The MR45V256A is a nonvolatile 32,768-word x 8-bit ferroelectric random access memory (FeRAM) developed  in the ferroelectric process and  silicon-gate CMOS technology. The MR45V256A is accessed using Serial Peripheral Interface.Unlike SRAMs, this device, whose cells are nonvolatile, eliminates battery backup required to hold data. This device has no mechanisms of erasing and programming memory cells and blocks, such as  those used for various EEPROMs. Therefore, the write cycle time can be equal to the read cycle time and the power consumption during a write can be reduced significantly. 

 

The MR45V256A can be used in various applications, because the device is guaranteed for the write/read tolerance of 10^12 cycles per bit and the rewrite count can be extended significantly.

 

MR45V256AMAZAABMR45V256AMAZAAB

 

MR48V256A

 

The MR48V256A is a nonvolatile 32,768-word x 8-bit ferroelectric random access memory (FeRAM) developed in the ferroelectric process and silicon-gate CMOS technology. Unlike SRAMs, this device, whose cells are nonvolatile, eliminates battery backup required to hold data. This device has no mechanisms of erasing and programming memory cells and blocks, such as those used for various EEPROMs. Therefore, the write cycle time can be equal to the read cycle time and the power consumption during a write can be reduced significantly. 

 

The MR48V256A can be used in various applications, because the device is guaranteed for the write/read  tolerance of 10^12 cycles per bit and the rewrite count can be extended significantly.

 

MR48V256ATAZA3A-7MR48V256ATAZA3A-7

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