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Related

Raspberry Pi server clusters

morgaine
morgaine over 13 years ago

One of my current intentions is to play with server clustering once the Raspberry Pi is in volume production and the 1-per-person restrictions are lifted.  I have a long-term background in parallelism and concurrency --- my doctoral research was in the topic, and I lectured on it later as well, so it's quite dear to my heart.  The very low price of the board makes this feasible with a monetary outlay far below anything else, so I'm really looking forward to an Rpi clustering project.

 

I'm sure that I'm not the only one thinking about Rpi+clustering. image  If anyone here has this kind of application in mind, or just general interest in the subject, please keep in touch and post any interesting links you may find on the topic.  Once there are millions of the boards around, this could be a very popular area. image

 

Morgaine.

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  • Former Member
    Former Member over 13 years ago in reply to morgaine

    in a different forum you would be told that a cluster of Pis is called

    a bramble, and is a reasonable thing to do. image

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  • morgaine
    morgaine over 13 years ago in reply to Former Member

    Oh but the comedy value of the fanbois over there is priceless!  Credit where credit is due. image

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  • rew
    rew over 13 years ago in reply to morgaine

    My master thesis was on parallel computing.

    The important thing to realize is that some applications are latency limited, and others are bandwidth limited.

     

    In short, suppose you're doing a weather simulation, then after each timestep, for each cell you need the (new) pressure and other parameters for the neighboring cells to be able to do the next calculation for the current cell. If that information was calculated on another node, you'll have to wait for that information to go back and forth between those two nodes.

    On the other hand, some applications do not need the feedback from the previous step on the other node, so all that matters is the CPU speed, and the bandwidth between nodes.

     

    In fact the raspberry pi isn't good at any of these. Networking would go through USB which incurs a 1ms latency every time you try to do something. USB is slow, and the CPU isn't fast.

     

    But still an interesting experiment. In an education environment, you can for example teach students to program the 64-raspberry-pi-cluster  and then later let them run for real on the bigger-better-faster cluster. For about $4000 you'd have yourself a good teaching-cluster. :-)

     

    Hmmmmm... Adding 64 thin-bevel(*) widescreens would give you an impressive (15k x 8k) videowall. Wow!

     

     

    (*) Or what is the rim around the screen called?

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  • morgaine
    morgaine over 13 years ago in reply to rew

    Roger Wolff wrote:

    > The important thing to realize is that some applications are latency limited,

    > and others are bandwidth limited.

     

    The important thing to realize is that some parallel applications are neither latency limited nor bandwidth limited, because not all parallel applications are in the area of HPC.  But I already explained that point in post #14 and then again in #20.

     

    The fact that Rpi can offer neither good bandwidth nor good latency (nor good CPU performance) is immaterial in such applications, of which there are many.  Rpi is not likely to be effective for supercomputing, as Eben Upton explained in answer to a question.  But clusters are certainly not limited to HPC.

     

    What's more, your reference to video walls happens to provide a rather nice example of an application that can make good use of a cluster of Rpi boards without being latency limited nor bandwidth limited, for the simple reason that it typically uses no IPC at all.

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  • Former Member
    Former Member over 13 years ago

    A topic i found from Stackoverflow if it could help.

    http://stackoverflow.com/questions/7420970/raspberry-pi-cluster-neuron-networks-and-brain-simulation

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  • morgaine
    morgaine over 13 years ago in reply to Former Member

    Very interesting answers provided at that link, thanks freads, especially the one about the SpiNNaker architecture which linked to articles at EEtimes and ZDnet:

     

    - http://www.eetimes.com/electronics-news/4217840/Million-ARM-cores-brain-simulator

    - http://www.zdnet.co.uk/news/emerging-tech/2011/07/08/million-core-arm-machine-aims-to-simulate-brain-40093356/

     

    From those links, it seems that the basic unit in SpiNNaker is a die with 18 ARM968 cores and 55 x 32-kbyte SRAM blocks, plus an additional 1 Gbit DDR SDRAM die, and the two are then packaged together in a 300-BGA.

     

    No doubt it's for research only, but sure would be nice if they went on to sell them. image

     

    By coincidence, I did my multiprocessor research in Manchester too.  Those were very interesting days.

     

    Morgaine.

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  • morgaine
    morgaine over 13 years ago in reply to morgaine

    More links about SpiNNaker:

     

    • A - http://apt.cs.man.ac.uk/projects/SpiNNaker/
    • B - http://apt.cs.man.ac.uk/projects/SpiNNaker/spin_fascicle.php
    • C - http://apt.cs.man.ac.uk/Projects/SpiNNaker/hardware/index3.php
    • D - ftp://ftp.cs.man.ac.uk/pub/amulet/papers/LAP_IEEEDandT_07.pdf
    • E - http://eprints.soton.ac.uk/270985/
    • F - http://www.artificialbrains.com/spinnaker
    • G - http://neuromorphs.net/nm/wiki/ng11/results/Spinnaker

     

    Link C details the PCBs they've been creating for their SpiNNaker BGA devices.  It's interesting that the "Spin3" board is unrelated to the million-core brain simulator but targets robots instead.

     

    The latest "Spin4" board adopts a very interesting design strategy for I/O.  Quoting the article:

     

    • "Rather than use lots of ribbon cables to connect boards together, inter-board links are concentrated in FPGAs and converted to serial format.  The high-speed serial interfaces on the FPGAs drive standard SATA hardware at 3 Gbps and SATA cables are used for board-to-board connections."

     

    Great reuse of commodity standards, must save them a ton of money versus proprietary HPC interconnects. image

     

    Morgaine.

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  • Former Member
    Former Member over 13 years ago in reply to morgaine

    Thanks for the University of Manchester links Morgaine. I am yet to study ARM processors and FPGAs. I'm still an Undergrad in Electronics and Communications unfortunately and i had plans to do projects based on FPGA, like i wanted to make an FPGA based High Frequency Trading platform for market analysis and all that stuff and then i restricted myself because FPGA is costly and i'm not having much of a knowledge to implement such systems. I hope i do that in my Masters degree which i'm planning to do on Computational Science and Engineering. ARM is the only way i think i will have to implement a HPC platform for analysis or atleast the platform itself can be my final year project running some basic parallel codes like image processing ones.

     

    Kishore

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  • morgaine
    morgaine over 13 years ago in reply to Former Member

    In case you didn't see it earlier, freads, we had a thread running here about Raspberry Pi + FPGAs:

     

        http://www.element14.com/community/thread/17692?tstart=30

     

    I sure hope a little community arises in time around combining an FPGA with Rpi, preferably something as open as possible in both hardware and software so that EE students can get their hands dirty at all levels rather than just being consumers of proprietary "and magic happens here" FPGA design software.

     

    Morgaine.

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  • Former Member
    Former Member over 13 years ago in reply to morgaine

    Yup...i'm really excited to see this post. Thank you so much Morgaine..i'm really happy. You should check out this person's website http://www.shakthimaan.com/downloads.html he is an open source guy maybe he could help. I still have to ask him about the project i will be doing. But i need to do my ground work, like study ARM processors and write code in MPI etc etc. I'm too bad at coding, i've get my hands dirty on that first during my summer holidays. I have my exams coming up next week and after that things need to take shape quickly if i want to do something useful.

     

    Kishore

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