Hey,
I'm fairly new to the electronics scene and was wondering what the minimum specs for an oscilloscope would be if i needed to look at raspberry pi spi transactions?
thanks.
Hey,
I'm fairly new to the electronics scene and was wondering what the minimum specs for an oscilloscope would be if i needed to look at raspberry pi spi transactions?
thanks.
Hi Doug, we need to see that scope... Looks like we should have another round of show me your Lab space!!! What other nice toys do you have?
To avoid aliasing (introduction of elements not present In the original signal and loss of information desired) you need to sample at twice the maximum frequency of the signal of interest.
But in order to see anything useful you need to sample at 10x the frequency.
So mid to high end scopes do just that - and average several samples when you are working at lower frequencies to make the 8 bit ADC look more like a 10 bitter.
MK
What Michael says is correct, especially for digital signals to get a reasonably accurate look at rise/fall times and other critical timing. I have an old (but nice)
Tektronix TDS 1012 100MHz, 1 Gs/s two channel w/external trigger digital scope that I bought for exactly that reason. The main drawbacks to the scope is a
small buffer (2.5K samples), and it is only two channels. 4 channel and 200 MHz (2 Gs/s) models also exist. The TDS 1012 was around $1200 USD when I
bought it and I still consider it a good investment although I do wish now that I had sprung for the 4 channel 200 MHz model.
I agree with alot of what is being said here but if your not designing the SPI logic or interface then you should be able to trust the signal integrit to a certain extent and what matters more is are you sending the right commands and data to the remote device. this can be achieved with not much more than 2-4X the data bit rate (So you dont miss the edges and are able to decode the signal
I have an MDO3054 (500Mhz 4 Channel with Logic Analyser ) with all the protocol stuff enabled and every time I have had an issue with SPI or I2C, it has come down to either having the wrong mode in my driver software or I forgot to terminate the signals with a suitable pullup
So at the end of the day, slowing down the signal to even below 1Mhz will allow any scope to see what mode your running in and that the levels are where they should be, after that, slowly crank up the speed till it stops working or you get what you want. If it stops working and you can still see the signal on the scope reliably, is it still at the right logic levels. Make sure you have the pull ups on I2C.
Also ask yourself why you need to be at 100+Mhz or even above 4Mhz, unless your driving a graphical display or trying to build a very fast high resolution ADC / DAC then you dont need to. You only need to be a little faster than your desired sample rate and most real world environmental measuring does not require more than a few samples per second, Audio sampling and generation would max out at 200 - 500Khz so still only a few Mbits/Second at best.
Now I have to say, having a real nice scope As Michael says... more expensive than the car, is very welcome, but in many diagnostic scenarios not essential
btw, logic analyzers like the Saliea do not capture the edges, typically they have a highspeed clock and sample the digital data into a RAM buffer at high speed, yes with a programable threashold in some cases to determin if logic 0 or 1 is present but they dont analyze the edges. so a 12Mhz analyzer only needs to sample at maybe 50Mhz but could be much less (24 even)
Yeah we aren't interested in seeing the relative rise fall times shapes of signals etc ..you are assuming that they have that bit right what are you trying to do is read the SPI bus and interpret the command words going to from the PI. since you have the clock edge provided to sample from the actual sample rate is actually the SPI clock frequency which is some significant divider value of the maximum of 125MHZ.
I know this guy mentioned an Oscilloscope and they as we all know are really cool but remember he doesn't necessarily know what he wants and is explicitly admitting this in the question if a simple logic analyser is what the job needs then we should not get stuck up on his original request but suggest the most appropriate tool for the job.
Not got one handy as any one got a pi taking over SPI to something? Stick a scope on it and see what the clock rate is ... I bet it's much much slower than the maximum!
Hi John,
From what I can tell, the processor peripheral goes to a very high speed (125MHz according to the BCM peripherals doc that was published), but the Linux driver may limit it (no idea) and then there is the general rule that any signal above 30MHz should always send warning alarms if it is apparent that they are constructed without care over routing those signals. I assumed no care was taken, because it routes to a typical DIL header, and no transmission line. (In a similar vein, any plastic breadboard design would be worriesome if designed for 30MHz+). With that guesstimate in mind, I nevertheless tested at 32MHz SPI clock (square wave, so needs more bandwidth than 32MHz for a nice shape) when I connected it to the XMOS startKIT board quite a while back. I don't have signal traces though : ( And perhaps there could be bit errors and unreliability. It might not be a very nice waveform. Probably higher values could be tried with experimentation (and attempts at minimising reflections), but going above 32MHz clock may not be very sensible without a lot of testing.
For the SPI communication bursts over a short length ribbon cable between the RPI and XMOS board, 32MHz 'worked' (i.e. it might not be reliable at all over a longer period, or some changing conditions, and a lower value may be more prudent - but it was so long ago, I only have screenshots of the logic analyzer capture from that time, I don't seem to have scope captures from then.
I am a retired electrical engineer and HAM radio operator, so a good scope and a Rigol DSA815 spectrum analyzer/tracking generator lets me design and build circuits in digital and RF. I am old and the mortgage is paid off, so nice toys can be done. I think the person asking the question is new to this and would do well to start with a low cost logic analyzer. I got one for less than $100 on eBay that does 24 channels of digital and can decode serial buses (amazing at that price!). I started electronics when I was 13 (1960) with vacuum tubes and 10 MHz scope and VTVM. It has been a wild ride and cheaper now than then! Best wishes, Doug
The device I'm talking to is a 320x240 tft screen It's 16bit color so 2 transfers per pixel And I'm looking to get at least 30 frames a second So that's 76800 pixels plus a few front and back porch transfers hsync vsync etc So I'll call it 180000180000 transfers to get a little wiggle room So times 30 5.4million transfers a second 8 bits per transfer so 43.2million clock cycles per second I don't know what kind of delay there is between transfers So it seems like I need at least 50Mhz So from what I'm hearing I need 100Mhz scope/logic analyzer If anyone has anything variables I'm not taking into account let me know
Also wow what an amazing community. I've never been to a more active and helpful forum.
The screen is not fully refreshed each time. So figure on half that average rate.
Clem