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Files Raspberry Pi 5 Pinouts including GPIO for the 40 Pin Header
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  • Author Author: cstanton
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EMI-Reduction-Techniques
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Raspberry Pi 5 Pinouts including GPIO for the 40 Pin Header

This graphic shows the pinouts of the connections on the Raspberry Pi 5, it is at the default configuration with the default device tree overlay. The default configuration mostly aligns with 'F1' in the table below.

Click 'Download' for the full-size version.

The diagram is subject to change and could be considered a 'draft' version as it refers to a product that has yet to be released. 

In the diagram it covers the following headers:

  • J8 GPIO header, the default 40 pin gpio.
  • J14 PoE
  • J2 Power Switch (not officially confirmed, may be related to RTC battery instead)
  • J7 Composite Video (it's no longer on an audio jack)
  • J17 Fan Header (allowing for PWM control and sense for its speed)

A complimentary document for this is the following RP1 documentation:  RP1 Datasheet - Peripheral Controller Datasheet Draft as the input/output of the Pi is now handled by the RP1 which has its own GPIO.

Here is an excerpt from that document:

RP1 has 28 multi-functional General-Purpose Input/Output pins available to implement the standard Raspberry Pi 40-pin
GPIO connector. GPIO pins can withstand upto 5V when RP1 is powered, and 3.63V when RP1 is unpowered.

The pins are in a single electrical bank (VDDIO0). The GPIO bank (IO_BANK0) can be powered from 1.8V or 3.3V, but
interface timings have been specified at 3.3V. Each pin can be controlled directly by software, or by a number of other functional blocks.

The bank supports the following functions:

• 5 × UART
• 6 × SPI
• 4 × I2C
• 2 × I2S - 1× Clock Producer instance, 1× Clock Consumer instance.
• RIO - Registered IO interface
• 24-bit DPI output
• 4-channel PWM output
• AUDIO_OUT - Stereo PWM audio output
• GPCLK - General-purpose clock input and output
• eMMC/SDIO bus with a 4-bit interface
• Interrupt generation from pin level or edge transitions

The functional blocks and their locations on the GPIO pins have been chosen to match user-facing functions on the 40-
pin header of a Raspberry Pi 4 Model B.

--

As with previous Raspberry Pi models, the GPIO can have multiple functions, here is the table of the different capabilities of each GPIO.

Function                
GPIO F1 F2 F3 F4 F5 F6 F7 F8 F9
0 SPI0_SIO[3] DPI_PCLK UART1_TX I2C0_SDA SYS_RIO[0] PROC_RIO[0] PIO[0] SPI2_CSn[0]
1 SPI0_SIO[2] DPI_DE UART1_RX I2C0_SCL SYS_RIO[1] PROC_RIO[1] PIO[1] SPI2_SIO[1]
2 SPI0_CSn[3] DPI_VSYNC UART1_CTS I2C1_SDA UART0_IR_RX SYS_RIO[2] PROC_RIO[2] PIO[2] SPI2_SIO[0]
3 SPI0_CSn[2] DPI_HSYNC UART1_RTS I2C1_SCL UART0_IR_TX SYS_RIO[3] PROC_RIO[3] PIO[3] SPI2_SCLK
4 GPCLK[0] DPI_D[0] UART2_TX I2C2_SDA UART0_RI SYS_RIO[4] PROC_RIO[4] PIO[4] SPI3_CSn[0]
5 GPCLK[1] DPI_D[1] UART2_RX I2C2_SCL UART0_DTR SYS_RIO[5] PROC_RIO[5] PIO[5] SPI3_SIO[1]
6 GPCLK[2] DPI_D[2] UART2_CTS I2C3_SDA UART0_DCD SYS_RIO[6] PROC_RIO[6] PIO[6] SPI3_SIO[0]
7 SPI0_CSn[1] DPI_D[3] UART2_RTS I2C3_SCL UART0_DSR SYS_RIO[7] PROC_RIO[7] PIO[7] SPI3_SCLK
8 SPI0_CSn[0] DPI_D[4] UART3_TX I2C0_SDA SYS_RIO[8] PROC_RIO[8] PIO[8] SPI4_CSn[0]
9 SPI0_SIO[1] DPI_D[5] UART3_RX I2C0_SCL SYS_RIO[9] PROC_RIO[9] PIO[9] SPI4_SIO[0]
10 SPI0_SIO[0] DPI_D[6] UART3_CTS I2C1_SDA SYS_RIO[10] PROC_RIO[10] PIO[10] SPI4_SIO[1]
11 SPI0_SCLK DPI_D[7] UART3_RTS I2C1_SCL SYS_RIO[11] PROC_RIO[11] PIO[11] SPI4_SCLK
12 PWM0[0] DPI_D[8] UART4_TX I2C2_SDA AUDIO_OUT_L SYS_RIO[12] PROC_RIO[12] PIO[12] SPI5_CSn[0]
13 PWM0[1] DPI_D[9] UART4_RX I2C2_SCL AUDIO_OUT_R SYS_RIO[13] PROC_RIO[13] PIO[13] SPI5_SIO[1]
14 PWM0[2] DPI_D[10] UART4_CTS I2C3_SDA UART0_TX SYS_RIO[14] PROC_RIO[14] PIO[14] SPI5_SIO[0]
15 PWM0[3] DPI_D[11] UART4_RTS I2C3_SCL UART0_RX SYS_RIO[15] PROC_RIO[15] PIO[15] SPI5_SCLK
16 SPI1_CSn[2] DPI_D[12] MIPI0_DSI_TE UART0_CTS SYS_RIO[16] PROC_RIO[16] PIO[16]
17 SPI1_CSn[1] DPI_D[13] MIPI1_DSI_TE UART0_RTS SYS_RIO[17] PROC_RIO[17] PIO[17]
18 SPI1_CSn[0] DPI_D[14] I2S0_SCLK PWM0[2] I2S1_SCLK SYS_RIO[18] PROC_RIO[18] PIO[18] GPCLK[1]
19 SPI1_SIO[1] DPI_D[15] I2S0_WS PWM0[3] I2S1_WS SYS_RIO[19] PROC_RIO[19] PIO[19]
20 SPI1_SIO[0] DPI_D[16] I2S0_SDI[0] GPCLK[0] I2S1_SDI[0] SYS_RIO[20] PROC_RIO[20] PIO[20]
21 SPI1_SCLK DPI_D[17] I2S0_SDO[0] GPCLK[1] I2S1_SDO[0] SYS_RIO[21] PROC_RIO[21] PIO[21]
22 SDIO0_CLK DPI_D[18] I2S0_SDI[1] I2C3_SDA I2S1_SDI[1] SYS_RIO[22] PROC_RIO[22] PIO[22]
23 SDIO0_CMD DPI_D[19] I2S0_SDO[1] I2C3_SCL I2S1_SDO[1] SYS_RIO[23] PROC_RIO[23] PIO[23]
24 SDIO0_DAT[0] DPI_D[20] I2S0_SDI[2] I2S1_SDI[2] SYS_RIO[24] PROC_RIO[24] PIO[24] SPI2_CSn[1]
25 SDIO0_DAT[1] DPI_D[21] I2S0_SDO[2] AUDIO_IN_CLK I2S1_SDO[2] SYS_RIO[25] PROC_RIO[25] PIO[25] SPI3_CSn[1]
26 SDIO0_DAT[2] DPI_D[22] I2S0_SDI[3] AUDIO_IN_DAT0 I2S1_SDI[3] SYS_RIO[26] PROC_RIO[26] PIO[26] SPI5_CSn[1]
27 SDIO0_DAT[3] DPI_D[23] I2S0_SDO[3] AUDIO_IN_DAT1 I2S1_SDO[3] SYS_RIO[27] PROC_RIO[27] PIO[27] SPI1_CSn[1]

Each GPIO can have one function selected at a time. Likewise, each peripheral input (e.g. I2C3_SCL) should only be selected on one GPIO at a time. If the same peripheral input is connected to multiple GPIOs, the peripheral sees the logical OR of these GPIO inputs. Function selections without a named function in this list are reserved.

  • raspberry pi 5 40 pin gpio header
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  • rpi5
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  • raspberry pi 5 j17 fan header
  • raspberry pi 5 headers
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cstanton
cstanton
  • 17 Oct 2023
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