Integrating NFC with the NXP PN7150

Table of contents

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View the PN7150 Webinar Recording: Enhance your application with NFC thanks to NXP’s PN7150

 

 

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About

This roadtest will explore the NXP PN7150 High performance NFC controller with integrated firmware, supporting all NFC Forum modes. If you have NFC develiopment experience or are interested in learning more about developing NFC apps with the PN7150, please enroll in this roadtest.

 

About the PN7150

The high-performance full NFC solution PN7150 is a full NFC controller solution with integrated firmware and NCI interface designed for contactless

communication at 13.56 MHz. It is compatible with NFC forum requirements.

PN7150 is designed based on previous NXP NFC device generation. It

is the ideal solution for rapidly integrating NFC technology in any application, especially those running O/S environment like Linux and Android, reducing Bill of Material (BOM)

 

PN7150 Features

  • Full NFC forum compliance with small form factor antenna
  • Embedded NFC firmware providing all NFC protocols as pre-integrated feature
  • Direct connection to the main host or microcontroller, by I2C-bus physical and NCI protocol
  • Ultra-low power consumption in polling loop mode
  • Highly efficient integrated power management unit (PMU) allowing direct supply from a battery
  • PN7150 embeds a new generation RF contactless front-end supporting various transmission modes according to NFCIP-1 and NFCIP-2, ISO/IEC 14443, ISO/IEC 15693, MIFARE Classic IC-based card and FeliCa card specifications. It embeds an ARM Cortex-M0 microcontroller core loaded with the integrated firmware supporting the NCI 1.0 host communication. It also allows to provide a higher output power by supplying the transmitter output stage from 3.0 V to 4.75 V.
  • The contactless front-end design brings a major performance step-up with on one hand a higher sensitivity and on the other hand the capability to work in active load modulation communication enabling the support of small antenna form factor.
  • Supported transmission modes are listed in Figure 1. For contactless card functionality, the PN7150 can act autonomously if previously configured by the host in such a manner. PN7150 integrated firmware provides an easy integration and validation cycle as all the NFC real-time constraints, protocols and device discovery (polling loop) are being taken care internally. In few NCI commands, host SW can configure the PN7150 to notify for card or peer detection and start communicating with them.

 

Kit Contents

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PN7150 NFC controller SBC Kit-Arduino Compatible

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FRDM-KW41Z

 

Other Features

  • Includes NXP ISO/IEC14443-A and Innovatron ISO/IEC14443-B intellectual property licensing rights
  • ARM Cortex-M0 microcontroller core
  • Highly integrated demodulator and decoder
  • Buffered output drivers to connect an antenna with minimum number of external components
  • Integrated RF level detector
  • Integrated Polling Loop for automatic device discovery
  • RF protocols supported – NFCIP-1, NFCIP-2 protocol (see [8] and [11]) – ISO/IEC 14443A, ISO/IEC 14443B PICC, NFC Forum T4T modes via host interface (see [3]) – NFC Forum T3T via host interface – ISO/IEC 14443A, ISO/IEC 14443B PCD designed according to NFC Forum digital protocol T4T platform and ISO-DEP (see [1]) – FeliCa PCD mode – MIFARE Classic PCD encryption mechanism (MIFARE Classic 1K/4K) – NFC Forum tag 1 to 5 (MIFARE Ultralight, Jewel, Open FeliCa tag, MIFARE DESFire) (see [1]) – ISO/IEC 15693/ICODE VCD mode
  • Supported host interfaces – NCI protocol interface according to NFC Forum standardization
  • I 2C-bus High-speed mode
  • Integrated power management unit – Direct connection to a battery (2.3 V to 5.5 V voltage supply range) – Support different Hard Power-Down/Standby states activated by firmware – Autonomous mode when host is shut down
  • Automatic wake-up via RF field, internal timer and I2C-bus interface
  • Integrated non-volatile memory to store data and executable code for customization

 

Additional Information

PN7150 Manual

Important Dates

Enrollment Begin: Jan 25 2018

Enrollment Ends: Feb 25  2019

RoadTesters Selected: Feb 27 2019

Product Shipped: Feb 28 2019

RoadTesting Begins: Mar 7 2019

Reminder/Update Email: Apr 7 2019*

Submit Reviews By: May 7 2019*

*The element14 RoadTest Staff will send this reminder/update email.

**If a RoadTester is unable to meet the deadline, please notify the RoadTest Program Lead, , as soon as possible before the deadline.

RoadTesters

Terms and Conditions

RoadTest

NXP PN7150 NFC Controller Dev Kit

Terms and Conditions

These are the terms and conditions which govern the  NXP PN7150 NFC Controller Dev Kit contest. This Contest requires participants to submit an application indicating their previous experience with this type of equipment/component, information on what they would do to test the equipment/component, and the applicant’s desire to post a thorough review of their experience with images, photos, or other supplemental materials. Participants will be required to meet the Conditions for Participation.  The winners of this RoadTest will receive the item(s) listed below. RoadTest Reviews are due no later than 60 days after the receipt of the item(s). No other prizes are offered.

The Principal terms of the Competition:

The following words and phrases are used in these terms and conditions and have the meanings given to them below.

(RoadTest or Contest)

Key dates:

Applications Close: midnight (GMT) on Feb 25 2019

Announcement of Winner (estimated): Feb 28 2019

Prize:  NXP PN7150 NFC Controller Dev Kit

Additional Prizes: none

Competition Site: https://www.element14.com/community/groups/roadtest?ICID=menubar_resources_roadtest

Site or element14 Community: www.element14.com/community

Judges: members of the element14 community team chosen at the Organiser’s discretion.

Judging Criteria, All of the following which will have equal weighting:

· Demonstrated competence with the technologies including links or descriptions of past projects

· Qualifications as indicated by current job role and/or schooling/vocational training;

· A thorough description of how the prize would be tested;

· Likelihood that the Applicant will blog about the prize and provide a review on element14.com;

· Originality;

· Innovation.

Organiser: Premier Farnell plc (registered in England and Wales under company number 876412) whose registered office is at Farnell House, Forge Lane, Leeds, UK

Conditions for Qualification: in addition to meeting the requirements of these terms, all persons applying to take part in the Contest (each one an Applicant) must:

· Provide a RoadTest application describing what he/she would do if awarded the Prize including similar previous projects, product experience and qualifications

Terms: these terms and conditions which govern the Competition and to which the Organiser reserves the right to make changes from time to time and the latest version of these Terms from time to time will be posted to the Site.

  1. Eligibility
  2. Applications:
  3. Selecting Winners:
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  5. General:

1.1 Save as set out in these Terms, the Contest is open to any natural or legal person, firm or company or group of natural persons or unincorporated body.

1.2 All Applicants must be aged at least 18 at the time of their application.

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3.7

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5.3 The Organiser shall have the sole discretion to disqualify (without correspondence or right of appeal) any Applicant it considers to be adversely affecting the process or the operation of the RoadTest or to be in breach of these Terms or to be acting in a disruptive manner or with intent to annoy, abuse, threaten or harass any other Applicant or Participant.

5.4 The Organiser has the right to amend or add to these Terms from time to time. Revised Terms and Conditions will be posted on the Contest Site and it is a condition of entry to the RoadTest that Applicants agree to comply with these Terms and, if appropriate, such Terms as amended from time to time.

5.5 Headings are for convenience only and do not affect the interpretation or construction of these Terms and Conditions.

5.6 These Terms and the operation of the Contest shall be governed by and construed in accordance with English Law and any claim or matter arising under these Terms shall be subject to the exclusive jurisdiction of the English courts.

Comment List
Anonymous
  • to all roadtesters,

     

    If you completed the review, many thanks. This one was challenging!

     

    If you haven't posted a review, please post it now.

     

  • I've also found that porting (in my case to a LPC51U68) has been an exercise in frustration. There are always expected quirks of different families (such as the inconsistent I2C implementaions) but so far I've also stumbled over:

    • Source files copied into a project but completely ignored on compilation. (I had to edit the .cproject file manually!)
    • Confusing implementation of include file paths. (This also required .cproject file editing to get working.)
    • Some functions that return 0 for success (TML) and some that return 0 for failure (NxpNci).
    • Having to enable clocks for GPIO ports (including a non-existent port 0) to get simple GPIO to work. Forget this and it doesn't error - it's just silently ignored.
    • Some examples leaving VEN high (LPC82x) and some low (FRDM-K64F). Which is right?
    • Switching between a LPC-Link based debugger and a Segger one causes the IDE to need restarting.

     

    I'm now at a stage where the code usually works if I slowly debug through it, but not if I run it! It's probably down to the I2C peripheral implementation, but I'm almost at the point of giving up on running it on an NXP device. image

  • Finally, light seen at the end of a very long tunnel... image

     

    Tests with a couple of different NFC cards including an NXP NFC tag

    image

     

    And a test using my phone and a rather old ACR122 NFC reader... cooool.

     

    image

     

    And the beauty of road testing is picking out little quirks along the way... this time testing with a makeshift breakout board with 4k7 pull-up resistors included...

     

    image

     

    ... to then discover that the Sample Card has a URL included in NDEF data, but not always picked up by the code...

     

    image

  • LOL imageimage

     

    It took until I posted my query online to then quickly discover the silly error I made in my "tml_WaitForRx(uint16_t timeout)" function.

     

    Problem sorted...

  • I'm not quite there yet.

     

    I've got to the same position in both FRDM-KW41Z and on my PSoC 6.

     

    In the "nfc_task.c" file I hit the error condition in

     

    if (NxpNci_Connect() == NFC_ERROR) {
            printf("Error: cannot connect to NXPNCI device\n");
            return;
        }

     

    and within that function it exits here:

     

        /* Loop until NXPNCI answers */
        printf("Loop until NXPNCI answers \r\n");
        while(NxpNci_CheckDevPres() != NXPNCI_SUCCESS)
        {
            if(i-- == 0) return NXPNCI_ERROR;
            Sleep(500);
        }

     

    and that NxpNci_CheckDevPres() is trying to send and receive data to device...

     

        tml_Send(NCICoreReset, sizeof(NCICoreReset), &NbBytes);
        NCI_PRINT_BUF("NCI >> ", NCICoreReset, NbBytes);
        if (NbBytes != sizeof(NCICoreReset)) return NXPNCI_ERROR;
        tml_Receive(Answer, sizeof(Answer), &NbBytes, TIMEOUT_100MS);
        if ((NbBytes == 0) || (Answer[0] != 0x40) || (Answer[1] != 0x00)) return NXPNCI_ERROR;
        NCI_PRINT_BUF("NCI << ", Answer, NbBytes);

     

    .... and here it "tml_Sends" ok but with the "tml_Receive" it does not quite make it.

     

    So I'm guessing something is not right with my I2C stuff in TML (Transport Mapping Layer :-)) but not sure what yet.

     

    Did you experience any of this. Would have any thoughts/suggestions following your endeavours.

  • I stumbled over it and it was something like that - basically and abstraction layer over the comms with the PN7150. However, as I've tried to port stuff to the 51U68 I've found that abstraction to be meaningless. I've had to pretty much rewrite stuff.

  • Hmmm, is TML = Transport Media/Master? Layer, perhaps...

     

    This is what happens come Friday... image

  • Thanks for the MBED pinout link. Most helpful indeed. That is exactly what I've been wanting. If only I found that earlier as I ended up creating a poor handwritten version out of frustration trying to make sense of NXP official documentation and kept using pins that were allocated for something else on the board.

     

    Here's a trivia question for you. Any clues as to what "TML" stands for?

     

    I'm porting the code across to PSoC6 to test and wondered whether to use a more meaningful name for that c file as it appears just to handle the interface between module and board with as you say pin definitions and i2c read/write functions etc.

  • Excellent. That seems to work. I get the tag ID displayed in the Android app. So many hoops to jump through but we finally got there! image

     

    I've also made some progress porting a hybrid of the LPC82X and FRDM-K64F code over to the LPC51U68 (although MCUXpresso has not been helping matters). I want to get my head round the simplest implementation for the PN7150 without having FreeRTOS and BLE in the mix.

  • Since PTA0 and PTA1 conflict with SWD I decided to try different pins on the KW41 board.  The file Nfc/TML/src/tml.c contains the "default" pin locations for IRQ and VEN .  It is interesting to note that these are NOT PTA0 or PTA1 .  They are PTC18 for IRQ and PTC17 for VEN.  Note that the "default" as has a define for RIGADO.  

     

    I commented out RIGADO since we have a frdm-kw41 board

     

    //#define RIGADO

     

    I took off the PN board from the frdm-kw41 board and used jumper wires to connect them

    See this link for the pinout of the FRDM-KW41 board

    https://os.mbed.com/platforms/FRDM-KW41Z/

    And PN7150 pinout for arduino.

    https://www.nxp.com/docs/en/user-guide/UM10956.pdf

     

    frdm-k41        pn7150

     

    3v3                    3v3

    5v                      5v

     

    i2c SCL             i2c SCL

    i2c SDA            i2c SDA

     

    PTC18  J1p7             IRQ

    PTC17  J1p6             VEN