This is a bit of a niche blog.

The TI Hercules has two family members that always have memory parity checking on.

That's very good, but requires a dedicated way of loading the memory into the flash.

In the past this was documented. But the documentation is not updated for the latest TI ARM compilers (V 18 and higher).

And the documentation is marked for deletion.

I'm going to document here how I get it working, in case the original documentation disappears without backup.

If TI reports an official way of working (I raised a request) I will update this post.

Add ECC generation in the linker file generated by HALCoGen

The HALCoGen generated linker file for these controllers doesn't have the ECC mechanism in them.

Here's (relevant part of) the file I use, based upon the one from the link above), with ECC enabled.

It's HALCoGen round-trip safe. If you regenerate code in HALCoGen, the changes are preserved.

MEMORY
{
/* USER CODE BEGIN (2) */
#if 0
/* USER CODE END */
    VECTORS (X)  : origin=0x00000000 length=0x00000020
    FLASH0  (RX) : origin=0x00000020 length=0x001FFFE0
    FLASH1  (RX) : origin=0x00200000 length=0x00200000
    STACKS  (RW) : origin=0x08000000 length=0x00001500
    RAM     (RW) : origin=0x08001500 length=0x0007eb00

/* USER CODE BEGIN (3) */
#endif
    VECTORS (X)  : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
    FLASH0  (RX) : origin=0x00000020 length=0x001FFFE0 vfill = 0xffffffff
    FLASH1  (RX) : origin=0x00200000 length=0x00200000 vfill = 0xffffffff
    STACKS  (RW) : origin=0x08000000 length=0x00001500
    RAM     (RW) : origin=0x08001500 length=0x0007EB00

    ECC_VEC (R)  : origin=0xf0400000 length=0x4 ECC={ input_range=VECTORS }
    ECC_FLA0 (R) : origin=0xf0400000 + 0x4 length=0x3FFFC ECC={ input_range=FLASH0 }
    ECC_FLA1 (R) : origin=0xf0440000 length=0x40000 ECC={ input_range=FLASH1 }
/* USER CODE END */
}

/* USER CODE BEGIN (4) */
ECC
{
   algo_name : address_mask = 0xfffffff8
   hamming_mask = R4
   parity_mask = 0x0c
   mirroring = F021
}/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
/* USER CODE BEGIN (5) */
/* USER CODE END */
    .intvecs : {} > VECTORS
    .text   align(32) : {} > FLASH0 | FLASH1
    .const  align(32) : {} > FLASH0 | FLASH1
    .cinit  align(32) : {} > FLASH0 | FLASH1
    .pinit  align(32) : {} > FLASH0 | FLASH1
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM

/* USER CODE BEGIN (6) */
/* USER CODE END */
}

It replaces the HALCoGen generated memory config with a similar one, but adds a ECC check number generation strategy

Because all changes are within USER CODE BEGIN and USER CODE END blocks, they survive round-trip development between HALCoGen and Code Composer Studio.

This is compiler version independent. You have to do this for every version.

Adapt Project Properties for Tool Chain and Programmer

Handling ECC has changed across tool chain versions (specifically the linker settings).

I forgot from what version on, but certainly TI Compiler V 20 and above have this.

The project properties dialogs in CCS adapt to the tool chain you are using.

Here is what I set for TI Compiler V 20:

Compiler / Linker:

Programmer:

I hope that this small set of instructions helps.