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  • Author Author: Sunnyzhuo
  • Date Created: 23 Nov 2009 12:45 AM Date Created
  • Last Updated Last Updated: 7 Oct 2021 1:27 AM
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Driver Assistance Systems with FPGAs

Source: http://www.altera.com

 

Driver assistance is the fastest growing segment within the automotive space, and several factors are fueling its growth. First is the increased emphasis by the car manufacturers on driver and passenger safety. Second is several new mandates passed by the government in different parts of the world to make passenger cars safer and secure. For example in 2004, the US government passed a mandate whereby all light vehicle cars must have electronic tire pressure monitoring systems by 2008. Similar types of mandates have been passed in Europe and Japan.

 

 

 

 

Car manufacturers are increasing their focus on implementing driver assistance applications, especially active safety applications, to meet these government mandates. Some active safety applications include RADAR imagers for crash avoidance, cameras for lane change detection and warning, night vision systems, and adaptive cruise control.

 

Most of the driver assistance applications require a significant amount of image processing. For all the higher-end technologies such as RADAR (see Figure 1) and optical sensors, large amounts of data must be handled in real time. High levels of image manipulation and processing must be carried out at high speed and in parallel. The scaling, processing, and image recognition all require new levels of digital signal processing (DSP) functionality that are out-pacing the capabilities of stand-alone DSP devices. CycloneRegistered series FPGAs have successfully been designed into several driver assistance applications.

 

Figure 1. RADAR-Based Adaptive Cruise Control System

 

image

 

Notes:


A/D = analog-to-digital
D/A = digital-to-analog
CAN = controller Area Network

 

AlteraRegistered FPGAs provide a versatile platform for real-time driver assistance systems due to the high-performance parallel processing DSP elements within the FPGA architecture. FPGAs are designed to provide efficient and massively parallel DSP functionality with performance up to 25 gigamultiplies per second. With embedded multipliers, clock managers, and internal block memory, real-time processing done in hardware within the FPGA can reduce the requirements on the software-driven tasks. Balancing hardware and software tasks between microprocessors, digital signal processors, and FPGAs can be carried out using the NiosRegistered II embedded processor. This makes FPGAs an ideal stand-alone solution or one complementary to more traditional solutions.

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