The 32-bit MPC5746M Qorivva MCU is built on Power Architecture technology and is our first powertrain device with more than two processing cores.
The MPC5746M addresses the requirements of direct injection, advanced diesel, transmission, hybrid electric and full electric powertrain applications to meet the most extreme regulatory and environmental emission qualifications.
The MPC5746M is part of the SafeAssure program, designed to help system manufacturers more easily achieve compliance with functional safety standards. The SafeAssure program is built around a multicore safety architecture to assist customers in ISO26262 functional safety certification for ASIL-D safety integrity.
In order to minimize additional software and module-level features to reach this target, on-chip redundancy is offered for the critical components of the MCU. These include multiple CPU computational cores with delayed lockstep, I/O processor core, DMA controller, interrupt controller, dual crossbar bus system, memory protection unit, fault collection unit (FCCU), flash memory and RAM controllers, peripheral bus bridge, system and watchdog timers and end-to-end error correction coding (ECC).