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LAN9354 -  Wrong chip id been read by processor(mdc and mdio)

caspersweety

Hi,

We have been using imx6ul processor with external phy chip set (lan9354 -Rmii interface).

 

The driver fails at chipid(since instead of 9354 ,FFFF data is been read)

The phy address been configured to 0 -> HW strapping done

 

We probed for MDC and MDIO lines ,we could see data and clock pulses whenever we tried communicating with phy(tried reading the chipid).

 

At U-boot:

 

We tried reading with mii info and mdio read commands.

 

=> mii info

PHY 0x00: OUI = 0x0000, Model = 0x00, Rev = 0x00, 100baseT, FDX

 

 

=> mdio read 0x00 0x50

0x00 is not a known ethernet

Reading from bus FEC0

PHY at address 0:

80 - 0xffff

 

 

 

 

Can you please help us to resolve the issue/suggest some ways to debug the phy chipset?

  • It is incredibly difficult to debug these things.

    I've done it in the past and ended up using a scope to monitor the MD interface and the data interface.

    Writing utilities to read and write all the PHY registers under direct human control for debugging.

    Many of these PHY chips are very complicated and you will need the full data sheet and user manuals.

    The part you are using comes from Microchip so there should be some documentation.

     

    I've used a similar part, also from Microchip (who acquired it when they bought Micrel - KSZ8863)

     

    If you are really stuck it's worth asking Microchip for help.

     

    MK