Delivering a keynote address at the Design Automation Conference (DAC) last week Freescale VP and GM Lisa Su challenged toolmakers to come up with “better dynamic power analysis and better low power design techniques with results analysis that includes feedback from silicon runs.” She also called for a standard power format across EDA vendors as well as tools that better model technology aging effects and better verification simulation tools.
The Freescale exec characterized the embedded market as “the next big growth wave” and said the design-automation community can accelerate innovation “by scaling up with faster tools and scaling out into richer eco-systems."
With the number of cores per processor increasing and integration driving design complexity are EDA tools keeping pace? What do you think?