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Embedded and Microcontrollers
Embedded Forum Multi master i2c
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Forum Thread Details
  • State Not Answered
  • Replies 7 replies
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  • i2c
  • slave
  • master
  • protocol
Related

Multi master i2c

dr.akshay_1980@yahoo.com
dr.akshay_1980@yahoo.com over 10 years ago

I want to know real life example in which two masters need to communicate to slave in i2c ? How can I provide the control to either master in my C code, eventually only one will communicate otherone has to drop the communication. Am I right. kindly put your inputs to this ..

 

 

Thanks,

Akshay

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  • shabaz
    shabaz over 10 years ago +1
    I get the feeling these are test questions for a college course (much like the previous questions were from an interview). If this is not the case then I do apologise. If it is the case, then you need…
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  • shabaz
    0 shabaz over 10 years ago

    I get the feeling these are test questions for a college course (much like the previous questions were from

    an interview). If this is not the case then I do apologise.

     

    If it is the case, then you need to do the research surely? If it is not the case, a lot has been written about this 30+ year old protocol available via google.

    Do you have a real need you're trying to solve?

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  • dr.akshay_1980@yahoo.com
    0 dr.akshay_1980@yahoo.com over 10 years ago in reply to shabaz

    hi shabaz very smart buddy, yes this was indeed interview question, I only know its theory(multimaster) but I haven't practically implemented that hence not able to answer interviewer queries... surely buddy it need hell lot of research work...

     

    In case you get to know in future kindly share..

     

    Thanks,,

    Akshay

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  • shabaz
    0 shabaz over 10 years ago in reply to dr.akshay_1980@yahoo.com

    Hi Akshay,

     

    I'm not sure it is that common, I could be wrong. There may be certain scenarios

    where it is needed but I don't know them, which is why it would be good to know if there

    was a requirement that needed to be addressed.

    Perhaps in some redundant systems (e.g. active/standby) it might get used.

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  • gdstew
    0 gdstew over 10 years ago in reply to shabaz

    If you wanted to do peer to peer communications using I2C it would require that both ends be masters. The master I2C device is responsible for generating the

    SCL clock (slaves can hold it low and stretch the clock to allow them time to respond) and when multiple masters want the bus they synchronize the clock between

    themselves also by holding it low with each master holding it low for a different amount of time. After the master with the longest clock low time releases the clock

    the clock is synchronized and after the proper minimum clock high hold time is satisfied, a start condition is generated by all masters and an arbitration data bit

    stream (address) sent out by each master to determine which master has the highest priority much the same way that CAN bus does. If a master sees a low on

    the data line when it is outputting a high, it has lost the arbitration and stops trying to send. In order to optimize the time needed and satisfy timing requirements

    this is all normally done by the I2C interface hardware.

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  • shabaz
    0 shabaz over 10 years ago in reply to gdstew

    Gary Stewart wrote:

     

    If you wanted to do peer to peer communications using I2C

    I get that this could be technically feasible, but I'm wondering is it actually used in this manner much? There was a time when Philips was pushing I2C master peripheral chips (so people could attach them to microcontrollers) but they died out as soon as microcontrollers with serial interfaces (including I2C/TWI but also UART) became very common. And so there is the choice of many serial protocols for peer-to-peer comms.

     

    Not saying it doesn't happen at all.

     

    Active/standby scenarios might be more likely though - picture a redundant processor system in where there are (say) two processors (e.g. one per card) that check (say) temperature or other health parameters or identification of the remainder cards via I2C but where usually only one processor is intended to be active. In other words, the current active processor talks to all the I2C slaves (i.e. not used for peering between the processors).

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  • shabaz
    0 shabaz over 10 years ago in reply to gdstew

    I guess I was wrong, looks like it is done, there is a post here where someone mentions a 65-node system where they did this (they don't give the reason why).

    http://www.microchip.com/forums/m308316.aspx

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  • shabaz
    0 shabaz over 10 years ago in reply to gdstew

    I guess I was wrong, looks like it is done, there is a post here where someone mentions a 65-node system where they did this (they don't give the reason why).

    http://www.microchip.com/forums/m308316.aspx

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  • gdstew
    0 gdstew over 10 years ago in reply to shabaz

    About the only advantages I can see is that I2C has multi-master capability designed in, only uses two wires to do it, and a lot of modern microcontrollers and SOCs have the hardware to fully support it.

     

    Still, from my experience seeing something that uses multi-master I2C is rare.

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