What do these red lines signify within ModelSim?

Could someone please shed some light on what these red lines indicate for this modelsim wave output? This wave was generated using a test bench (if that has any relation)? I think that the "X" indicates that the state is unknown but what I don't understand is how I might simulate this with a test bench and get models to generate all green lines with known signals?

Thanks, MR.

0 oldmanraskers over 10 years ago

Problem solved - I have mistakenly set the value of the outputs at the start of my test bench and that caused the some problem - I'm not sure why the problem occurred - maybe someone could still shed some light on that
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0 blueapple over 5 years ago in reply to oldmanraskers

hello,
I am learning VHDL now and also meet the same problem as you,so i want to know something:

1.how to initialize the signals or ports in the testbench?
2.as for the red lins,what occurs that expect from initializing?
3.does it necessary to set clock signals and reset signals in the testbench in combanational circuts design?

thank you!
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