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Embedded and Microcontrollers
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Embedded and Microcontrollers
Embedded Forum Get Your Xilinx FPGA/Programmable SoC Questions Answered here
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Related

Get Your Xilinx FPGA/Programmable SoC Questions Answered here

rscasny
rscasny over 6 years ago

In the past year or so, the element14 community has been offering quite a few programs, contests, and initatives around Xilinx's FPGA and heterogeneous SoC, ZYNQ. We have hosted webinars, run roadtests, and offered a training program last year called Path to Programmable.

 

I see element14 member interest in Xilinx product knowledge on the rise. I plan on offering more Xilinx-related projects and roadtests in the coming months. (Stay tuned to Path to Programmable 2 with the Ultra96v2) Given all this activity, I thought it would be a great idea to bring in a Xilinx product expert for some well needed Q&A time. So let me introduce you to Adam Taylor ( adamtaylorcengfiet ).

 

I believe Adam has been an element14 member for several years. He is the Director of ADIUVO Engineering. He is a Chartered Engineer and Fellow of the Institute of Engineering and Technology. He is well known for his Microzed Chronicles. He writes the Exploring the Programmable World for element14. Adam has been instrumental in developing element14's FPGA/Programmable SoC Essentials.

 

Adam also is an expert in the PYNQ framework: Python for ZYNQ productivity. So, if you are asoftware developer who wants to explore the Programmable world, I'd encourage you to ask Adam your top questions.

 

So, if you have any questions revolving around FPGAs, programmable SoCs, a project in progress, perhaps even a question about Vivado, please click REPLY and asked them here.

 

Sincerely,

 

Randall Scasny

-element14 Team

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Top Replies

  • jomoenginer
    jomoenginer over 6 years ago +4
    Awesome! It's great that adamtaylorcengfiet is a resource on element14 for Programmable SoC questions. I'm sure I will have many as I finish my Digilent Zybo Z7 RoadTest. I do find Adam's Microzed Chronicles…
  • jomoenginer
    jomoenginer over 6 years ago +4
    For what it's worth, there is an Integrating Arm Cortex-M soft CPU IP into FPGAs virtual workshop that features Adam Taylor as an instructor and uses the Digilent Arty S7-50T to be held August 14th, 2019…
  • wolfgangfriedrich
    wolfgangfriedrich over 6 years ago +3
    I would appreciate any comments on a process on how to make the DDR3 SDRAM MIG work without using the AXI interface in VHDL. As a target platform I have the Digilent Arty S7 board. I tried this during…
Parents
  • platin21
    platin21 over 6 years ago

    I wonder if somebody did already make a PCIe driver for the AxiEthernet via the XDMA?

    I feel so lost.

    It's incredbliy hard to get it right as of the interrupts and that it loses the completed count e.g sometimes i get a race between driver and fpga.

    We got the TX Path working but the RX seems to just not care about any packet arriving…

    We are using the arty 7.

    But maybe this is the wrong place to ask…
    (Can't get a FAE sadly as the contact was lost.)

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  • platin21
    platin21 over 6 years ago

    I wonder if somebody did already make a PCIe driver for the AxiEthernet via the XDMA?

    I feel so lost.

    It's incredbliy hard to get it right as of the interrupts and that it loses the completed count e.g sometimes i get a race between driver and fpga.

    We got the TX Path working but the RX seems to just not care about any packet arriving…

    We are using the arty 7.

    But maybe this is the wrong place to ask…
    (Can't get a FAE sadly as the contact was lost.)

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • Cancel
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