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Build project in MPLAB, newbie question

mattybee

HI,

 

This is my first foray into working with PIC microchips.  I'm trying to work with someone else's code/project notes and have tried to build the code for a

PIC16F88-I/P and getting compilation errors.  I think I've bitten off more than I can chew here image

 

Can anyone help - it may be I am doing something basic that's wrong, or perhaps the code is out of date for later versions, I just don't know.

 

Many thanks,

 

 

----------------------------------------------------------------------

Release build of project `C:\GHWT MIDI\midi.mcp' started.

Language tool versions: MPASMWIN.exe v5.49, mplink.exe v4.47, mplib.exe v4.47

Wed May 01 14:33:58 2013

----------------------------------------------------------------------

Make: The target "C:\GHWT MIDI\GHWT.o" is out of date.

Executing: "C:\Program Files\Microchip\MPASM Suite\MPASMWIN.exe" /q /p16F88 "GHWT.asm" /l"GHWT.lst" /e"GHWT.err" /o"GHWT.o"

Error[113]   C:\GHWT MIDI\GHWT.ASM 43 : Symbol not previously defined (_WRT_ENABLE_OFF)

Message[302] C:\GHWT MIDI\GHWT.ASM 71 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Message[302] C:\GHWT MIDI\GHWT.ASM 72 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Message[302] C:\GHWT MIDI\GHWT.ASM 76 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Message[302] C:\GHWT MIDI\GHWT.ASM 79 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Message[302] C:\GHWT MIDI\GHWT.ASM 82 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Message[302] C:\GHWT MIDI\GHWT.ASM 88 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Message[302] C:\GHWT MIDI\GHWT.ASM 91 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Message[302] C:\GHWT MIDI\GHWT.ASM 99 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Message[302] C:\GHWT MIDI\GHWT.ASM 124 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Message[302] C:\GHWT MIDI\GHWT.ASM 165 : Register in operand not in bank 0.  Ensure that bank bits are correct.

Halting build on first failure as requested.

----------------------------------------------------------------------

Release build of project `C:\GHWT MIDI\midi.mcp' failed.

Language tool versions: MPASMWIN.exe v5.49, mplink.exe v4.47, mplib.exe v4.47

Wed May 01 14:34:01 2013

----------------------------------------------------------------------

BUILD FAILED

 

Site links & code below:

 

http://home.cogeco.ca/~mybrainhurts/GHDrum.htm

 

http://home.cogeco.ca/~mybrainhurts/GHDRUM.txt

Parents

  • Regarding the PIC configuration:

     

    A typical main asm file starts with these directives (copied from example asm file from MPASM folder):

    ;------------------------------------------------------------------------------
; PROCESSOR DECLARATION
;------------------------------------------------------------------------------


     LIST      p=16F88              ; list directive to define processor
     #INCLUDE <P16F88.INC>          ; processor specific variable definitions


;------------------------------------------------------------------------------
;
; CONFIGURATION WORD SETUP
;
; The 'CONFIG' directive is used to embed the configuration word within the 
; .asm file. The lables following the directive are located in the respective 
; .inc file.  See the data sheet for additional information on configuration 
; word settings.
;
;------------------------------------------------------------------------------


     __CONFIG    _CONFIG1, _CP_OFF & _CCP1_RB0 & _DEBUG_OFF & _WRT_PROTECT_OFF & _CPD_OFF & _LVP_OFF & _BODEN_OFF & _MCLR_ON & _PWRTE_ON & _WDT_OFF & _INTRC_IO
     __CONFIG    _CONFIG2, _IESO_OFF & _FCMEN_OFF

     

    As the comments explain, all necessary configuration word settings are in the device specific INC file (P16F88.INC in this case):

     

    ; The following is an assignment of address values for all of the
; configuration registers for the purpose of table reads
_CONFIG1        EQU  H'2007'
_CONFIG2        EQU  H'2008'


;----- CONFIG1 Options --------------------------------------------------
_FOSC_LP             EQU  H'3FEC'; LP oscillator
_LP_OSC              EQU  H'3FEC'; LP oscillator
_FOSC_XT             EQU  H'3FED'; XT oscillator
_XT_OSC              EQU  H'3FED'; XT oscillator
_FOSC_HS             EQU  H'3FEE'; HS oscillator
_HS_OSC              EQU  H'3FEE'; HS oscillator
_FOSC_EC             EQU  H'3FEF'; ECIO; port I/O function on RA6/OSC2/CLKO
_EXTCLK              EQU  H'3FEF'; ECIO; port I/O function on RA6/OSC2/CLKO
_FOSC_INTOSCIO       EQU  H'3FFC'; INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin
_INTRC_IO            EQU  H'3FFC'; INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin
_FOSC_INTOSCCLK      EQU  H'3FFD'; INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin
_INTRC_CLKOUT        EQU  H'3FFD'; INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin
_FOSC_EXTRCIO        EQU  H'3FFE'; EXTRC oscillator; port I/O function on RA6/OSC2/CLKO
_EXTRC_IO            EQU  H'3FFE'; EXTRC oscillator; port I/O function on RA6/OSC2/CLKO
_FOSC_EXTRCCLK       EQU  H'3FFF'; EXTRC oscillator; CLKO function on RA6/OSC2/CLKO
_EXTRC_CLKOUT        EQU  H'3FFF'; EXTRC oscillator; CLKO function on RA6/OSC2/CLKO


_WDTE_OFF            EQU  H'3FFB'; WDT disabled
_WDT_OFF             EQU  H'3FFB'; WDT disabled
_WDTE_ON             EQU  H'3FFF'; WDT enabled
_WDT_ON              EQU  H'3FFF'; WDT enabled


_PWRTE_ON            EQU  H'3FF7'; PWRT enabled
_PWRTE_OFF           EQU  H'3FFF'; PWRT disabled


_MCLRE_OFF           EQU  H'3FDF'; RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD
_MCLR_OFF            EQU  H'3FDF'; RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD
_MCLRE_ON            EQU  H'3FFF'; RA5/MCLR/VPP pin function is MCLR
_MCLR_ON             EQU  H'3FFF'; RA5/MCLR/VPP pin function is MCLR


_BOREN_OFF           EQU  H'3FBF'; BOR disabled
_BODEN_OFF           EQU  H'3FBF'; BOR disabled
_BOREN_ON            EQU  H'3FFF'; BOR enabled
_BODEN_ON            EQU  H'3FFF'; BOR enabled


_LVP_OFF             EQU  H'3F7F'; RB3 is digital I/O, HV on MCLR must be used for programming
_LVP_ON              EQU  H'3FFF'; RB3/PGM pin has PGM function, Low-Voltage Programming enabled


_CPD_ON              EQU  H'3EFF'; Data EE memory code-protected
_CPD_OFF             EQU  H'3FFF'; Code protection off


_WRT_ALL             EQU  H'39FF'; 0000h to 0FFFh write-protected
_WRT_PROTECT_ALL     EQU  H'39FF'; 0000h to 0FFFh write-protected
_WRT_2048            EQU  H'3BFF'; 0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control
_WRT_PROTECT_2048    EQU  H'3BFF'; 0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control
_WRT_256             EQU  H'3DFF'; 0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control
_WRT_PROTECT_256     EQU  H'3DFF'; 0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control
_WRT_OFF             EQU  H'3FFF'; Write protection off
_WRT_PROTECT_OFF     EQU  H'3FFF'; Write protection off


_DEBUG_ON            EQU  H'37FF'; In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger
_DEBUG_OFF           EQU  H'3FFF'; In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins


_CCPMX_RB3           EQU  H'2FFF'; CCP1 function on RB3
_CCP1_RB3            EQU  H'2FFF'; CCP1 function on RB3
_CCPMX_RB0           EQU  H'3FFF'; CCP1 function on RB0
_CCP1_RB0            EQU  H'3FFF'; CCP1 function on RB0


_CP_ON               EQU  H'1FFF'; 0000h to 0FFFh code-protected (all protected)
_CP_ALL              EQU  H'1FFF'; 0000h to 0FFFh code-protected (all protected)
_CP_OFF              EQU  H'3FFF'; Code protection off


;----- CONFIG2 Options --------------------------------------------------
_FCMEN_OFF           EQU  H'3FFE'; Fail-Safe Clock Monitor disabled
_FCMEN_ON            EQU  H'3FFF'; Fail-Safe Clock Monitor enabled


_IESO_OFF            EQU  H'3FFD'; Internal External Switchover mode disabled
_IESO_ON             EQU  H'3FFF'; Internal External Switchover mode enabled

     

    Microchip provides really good infromation in datasheets, so again, if you want to know more, please see section 15.0 Special features of the CPU of the PIC16F87/88 datasheet.

    The CONFIG directive makes you life easier, so you don't need to know the exact memory location of the configuration bits and the code is a bit more portable to another PICs.

Reply

  • Regarding the PIC configuration:

     

    A typical main asm file starts with these directives (copied from example asm file from MPASM folder):

    ;------------------------------------------------------------------------------
; PROCESSOR DECLARATION
;------------------------------------------------------------------------------


     LIST      p=16F88              ; list directive to define processor
     #INCLUDE <P16F88.INC>          ; processor specific variable definitions


;------------------------------------------------------------------------------
;
; CONFIGURATION WORD SETUP
;
; The 'CONFIG' directive is used to embed the configuration word within the 
; .asm file. The lables following the directive are located in the respective 
; .inc file.  See the data sheet for additional information on configuration 
; word settings.
;
;------------------------------------------------------------------------------


     __CONFIG    _CONFIG1, _CP_OFF & _CCP1_RB0 & _DEBUG_OFF & _WRT_PROTECT_OFF & _CPD_OFF & _LVP_OFF & _BODEN_OFF & _MCLR_ON & _PWRTE_ON & _WDT_OFF & _INTRC_IO
     __CONFIG    _CONFIG2, _IESO_OFF & _FCMEN_OFF

     

    As the comments explain, all necessary configuration word settings are in the device specific INC file (P16F88.INC in this case):

     

    ; The following is an assignment of address values for all of the
; configuration registers for the purpose of table reads
_CONFIG1        EQU  H'2007'
_CONFIG2        EQU  H'2008'


;----- CONFIG1 Options --------------------------------------------------
_FOSC_LP             EQU  H'3FEC'; LP oscillator
_LP_OSC              EQU  H'3FEC'; LP oscillator
_FOSC_XT             EQU  H'3FED'; XT oscillator
_XT_OSC              EQU  H'3FED'; XT oscillator
_FOSC_HS             EQU  H'3FEE'; HS oscillator
_HS_OSC              EQU  H'3FEE'; HS oscillator
_FOSC_EC             EQU  H'3FEF'; ECIO; port I/O function on RA6/OSC2/CLKO
_EXTCLK              EQU  H'3FEF'; ECIO; port I/O function on RA6/OSC2/CLKO
_FOSC_INTOSCIO       EQU  H'3FFC'; INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin
_INTRC_IO            EQU  H'3FFC'; INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin
_FOSC_INTOSCCLK      EQU  H'3FFD'; INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin
_INTRC_CLKOUT        EQU  H'3FFD'; INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin
_FOSC_EXTRCIO        EQU  H'3FFE'; EXTRC oscillator; port I/O function on RA6/OSC2/CLKO
_EXTRC_IO            EQU  H'3FFE'; EXTRC oscillator; port I/O function on RA6/OSC2/CLKO
_FOSC_EXTRCCLK       EQU  H'3FFF'; EXTRC oscillator; CLKO function on RA6/OSC2/CLKO
_EXTRC_CLKOUT        EQU  H'3FFF'; EXTRC oscillator; CLKO function on RA6/OSC2/CLKO


_WDTE_OFF            EQU  H'3FFB'; WDT disabled
_WDT_OFF             EQU  H'3FFB'; WDT disabled
_WDTE_ON             EQU  H'3FFF'; WDT enabled
_WDT_ON              EQU  H'3FFF'; WDT enabled


_PWRTE_ON            EQU  H'3FF7'; PWRT enabled
_PWRTE_OFF           EQU  H'3FFF'; PWRT disabled


_MCLRE_OFF           EQU  H'3FDF'; RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD
_MCLR_OFF            EQU  H'3FDF'; RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD
_MCLRE_ON            EQU  H'3FFF'; RA5/MCLR/VPP pin function is MCLR
_MCLR_ON             EQU  H'3FFF'; RA5/MCLR/VPP pin function is MCLR


_BOREN_OFF           EQU  H'3FBF'; BOR disabled
_BODEN_OFF           EQU  H'3FBF'; BOR disabled
_BOREN_ON            EQU  H'3FFF'; BOR enabled
_BODEN_ON            EQU  H'3FFF'; BOR enabled


_LVP_OFF             EQU  H'3F7F'; RB3 is digital I/O, HV on MCLR must be used for programming
_LVP_ON              EQU  H'3FFF'; RB3/PGM pin has PGM function, Low-Voltage Programming enabled


_CPD_ON              EQU  H'3EFF'; Data EE memory code-protected
_CPD_OFF             EQU  H'3FFF'; Code protection off


_WRT_ALL             EQU  H'39FF'; 0000h to 0FFFh write-protected
_WRT_PROTECT_ALL     EQU  H'39FF'; 0000h to 0FFFh write-protected
_WRT_2048            EQU  H'3BFF'; 0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control
_WRT_PROTECT_2048    EQU  H'3BFF'; 0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control
_WRT_256             EQU  H'3DFF'; 0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control
_WRT_PROTECT_256     EQU  H'3DFF'; 0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control
_WRT_OFF             EQU  H'3FFF'; Write protection off
_WRT_PROTECT_OFF     EQU  H'3FFF'; Write protection off


_DEBUG_ON            EQU  H'37FF'; In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger
_DEBUG_OFF           EQU  H'3FFF'; In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins


_CCPMX_RB3           EQU  H'2FFF'; CCP1 function on RB3
_CCP1_RB3            EQU  H'2FFF'; CCP1 function on RB3
_CCPMX_RB0           EQU  H'3FFF'; CCP1 function on RB0
_CCP1_RB0            EQU  H'3FFF'; CCP1 function on RB0


_CP_ON               EQU  H'1FFF'; 0000h to 0FFFh code-protected (all protected)
_CP_ALL              EQU  H'1FFF'; 0000h to 0FFFh code-protected (all protected)
_CP_OFF              EQU  H'3FFF'; Code protection off


;----- CONFIG2 Options --------------------------------------------------
_FCMEN_OFF           EQU  H'3FFE'; Fail-Safe Clock Monitor disabled
_FCMEN_ON            EQU  H'3FFF'; Fail-Safe Clock Monitor enabled


_IESO_OFF            EQU  H'3FFD'; Internal External Switchover mode disabled
_IESO_ON             EQU  H'3FFF'; Internal External Switchover mode enabled

     

    Microchip provides really good infromation in datasheets, so again, if you want to know more, please see section 15.0 Special features of the CPU of the PIC16F87/88 datasheet.

    The CONFIG directive makes you life easier, so you don't need to know the exact memory location of the configuration bits and the code is a bit more portable to another PICs.

Children
  • in reply to koudelad

    David,

     

    Thanks for taking the time out to debug the issue or provide information to help the initial poster and myself figure this out.  I believe Matt Bayliss is probably doing what I tried to do, which is to follow an old guide on the internet explaining how to modify toy drums without having any recent experience with assembly language, PIC, or writing to any similar chips.  As a result, I don't think reading the documentation is doing to be of much help to either of us without investing some time following PIC programming tutorials.  That's why I think Bayliss says he bit off more than he can chew.  I don't get any warning at all, now that I fixed the spaces in my path and changed that one line Bayliss said to change.  I don't think that should have been enough to fix my issue, but what I had was totally stopping me from getting a hex file and now it seems resolved.  I'll let you know if the hex behaves as expected when I finish the rest of the tutorial/guide to modify this toy, based on if the toy functions as expected after the circuit is in place.  Thanks for helping while we fly blind without knowing how to read the instruments in the cockpit of the plane.  For people like us, the only thing that will help is gradual learning, quitting while we're behind, dumb luck (what I had, I guess), or a nice guy taking the time to fix the code.  I'm sure Bayliss would have liked the last option, but I'll happily give him my hex file if it works in the end.

  • in reply to keyosuke

    Hello Joseph,

     

    Thank you for an explanation, now I completely understand the situation. After reading the question for the first time, I got the impression that Matt wants to continue with the development of the original program.

     

    I think there is nothing wrong with asking for help just building the project, even if there is no intention to further develop this project. I can see that the original author published a source code, which is good, but it is even better to also publish the built hex file for people who don't want to dig deeper.

     

    If you needed any more help building the program, there is a lot of people here on the forum with MPLAB installation, ready to help image

     

    David

  • in reply to keyosuke

    OK, so I spent a few minutes on exploring the code in MPLAB.

     

    The only thing to make the ASM file buildable is to change _WRT_ENABLE_OFF for _WRT_OFF.

     

    EDIT: I found a way to attach files to this post, so anyone who needs a ready made asm and/or hex file, see below.

    Attachments:
    Drum.X.zip
  • in reply to koudelad

    Thanks, David.  You have really set a good example of what every knowledgeable person should be.