It's been quiet on the ERM front - I posted my ideas for the main board design a couple of months ago and there has been very little comment.
I know that shabaz is doing some work and waiting for a display.
I had already decided that the power supply would be on its own board and I've blogged a bit about work done on that.
Part of the motivation in splitting it off was to ensure that the effort has some useful spin off for me, (it costs serious time and some money)
but also to generate designs that will attract enough interest to widen the support base beyond those who actually want an ERM.
With that in mind I've decided (probably) to do the same thing with the FPGA.
The original plan was to use a Lattice ICE40UP5K soldered to the main board.
I'm now considering fitting a 40 pin header to the main board so that the FPGA (on a separate board) can connect by direct plugging or by ribbon cable,
or a tangle of wires if necessary.
This will allow me to use a breakout board for a Gowin GW1N-9 FPGA, which is currently much more interesting to me than using the Lattice part.
It would also allow people to use pretty much any FPGA dev board so maybe all those people getting the free Arty boards might be interested in
a worthy target for their new skills.
I should get my Gowin breakout boards next week - they'll look like this:
The GW1N-9 has about 8k LUTs, 20 multipliers (18 x 18) in DSP blocks, 26 block rams (2k byte), SDRAM (8Mbytes) and on chip boot flash.
It's about the same price as the Lattice part (but harder to get) and can be obtained in an 88pin QFN.
The breakout board format I'm using is big enough to take a TQFP 144 pin package or a 256 pin BGA so Altera or Xilinx parts are possible.
It takes a single 5V supply and has on board regulators and oscillator.
I'll do an ERM compatible Lattice UP5K version of it too.
Comments , please.
MK