In this Post , we will get helpful insights about an IP (Intellectual Property) , How we can create our Own , How we can Integrate it in Our Design using powerful Xilinx Vivado tools.
For Some Motivation about IP just see the below diagram of the Design I implemented in Vivado for working on PWM in Minized:
As you can see , the Above Design consists of various blocks Such as "ZYNQ_7 Processing System" Block,"AXI Interconnect "Block,"PWM_w_int" block etc..
All these blocks are simply the IP blocks that i used in this Complex design which helped me to build a complex system/Design relatively easy for me within no time.
It is Exaggerating to say , most of the VLSI design is now IP based , even the Most famous ARM company known for the ARM Cortex chips used in Smartphones (and iPhone also uses them) is actually selling its Core IP design for the Designers and Manufacturers to buy and use it under licenses.
This is just a Brief Idea of How demanding IP design is in Present day Designs.
What is An IP then ?
To make it short and Simple , IP(Intellectual Property) in Design can be mainly :
1.)Soft IP - Which Includes the HDL files of the Design or Schematic of Design with logic Gates i.e.., This ip is implemented in Design by means of softwares like Vivado..
2.) Hard IP - It refers to Designs given to us in the form of Layout Diagrams (giving Where should i put a pnp/npn transistor or MOSFETs ) , it is least flexible to modify. It is mainly used by Chip manufacturers at the Foundry.
There is also mixture of two : called as Mixed IP , don't have much significance.
What Do i require to create my own IP in Vivado?
You don't need much , except the Design of the IP you want to Implement , Powerful EDK tool like Vivado will do most of the Work for us , A great relief !
In order to Understand the Flow to create IP ,we create an IP for implementing "PWM controller with Interrupt Functionality" for zynq-7000 .
Below figure shows how the Actual PWM controller is Designed:
The Whole Design is broken into 3 Parts so that we can develop a complex design by just building the simple pars and join them Together by means of a Wrapper (the Covering Box) as shown above.
Here Block1 refers to desgin in "PWM_w_Int_v1_0.vhd" file in the attachments Archive , It is used to Interact with the AXI Interconnect Block to translate the AXI language from the AXI Interconnect block (shown Outside) to the Langauge Understood by the PWM Controller(Block 2 in yellow color).
The AXI Inter connect actually used to Connect multiple Master and Slave AXI Devices , and our Block1 works as a Slave Device , the Master we meant to be Interacting is the ZYNQ7 Processing System block as shown in the first figure in the Post.
The Block 2 is the Heart of the design , it is the PWM controller Design written in "PWM_Controller_Int.v" file , it takes the required Input regarding what should be the Duty Cycle , Time Period and Gives the PWM(Pulse Width Modulated Output) , Interrupt the PS .
The Covering Box is nothing but the Wrapper file , which creates the Instances of Block1 and Block2 from the HDL files and Map the Input and Output Ports among Them and to the Outer World as shown in the Block diagram.
Now we will be Creating custom IP for this PWM design
Note that Vivado is so powerful that it Creates the required AXI slave - Block1 and the Wrapper by opting for it when creating a new IP , through
1.)Open Vivado -> 2.) Tools ->3.) Create and Package new IP -> 4.)Next -> 5.)Select Create New AXI4 Peripheral -> 6.)Type IP name (For Eg:"PWM_Controller_Int.v" for my case) and Some Description about it , & Select required Path Directory -> 7.)This is the Important thing to Note: It is Mainly Based on your Application/Design , In my case i used below values
But if the Design require large Data Registers select the Appropriate AXI options.
->8.)Next ->9.)Add IP to Repository / Go for Edit as it needed to be. ->10.)Finish
In Order to Open IP to Edit , you can Do so by : ->1.) Select Window tab on the Top ->2.)Select IP Catalog ->3.)Type the Name of your IP ->4.)Right Click On it ->Select Edit in IP packages
Give the Editing Profile a name and Location where you would like to save those Settings/Temporary data while Editing your IP
This is the Screenshot of my IP Manager:
As you can see i already added the Design files under my IP wrapper file , but i am joking , Vivado automatically parses the Design files based on the Component Instantiations used in the Wrapper file,it adds those Designs files under it.
So if you are writing a new IP, Don't Forget to Instantiate your Each Design Block in your IP as a component in the Wrapper file and port map it (giving port names/Connecting to Already Existed/Created Ports in the Blocks).
On the Left Panel is the Package Steps tab.
After Integrating all the Design files under the Wrapper Run the Synthesis to Generate the Synthesized Design.
After Successfully Synthesizing your Design , you can Package the IP: By Going for "Package IP" as shown below after synthesizing the Design
1.)In the Identification Tab , Fill the details which help to Identify your IP based on these Fields effectively while Searching in the Catalog.
2.)In the Compatibility , you can tell Vivado ,for which family of Devices this IP can be Used
3.)For the Proper Functionality(Both Simulation 7 Synthesis) of your Design in the Standard way , you include the Design files in Simulation and Synthesis file groups , if not present already Press '+' icon to Create the File Group
For Instance My file Groups are as Follows:
The Drivers and Other are generated Automatically based on your Design files.
4.)Customization Parameters is helpful if you would like to change the Generic Parameters such as the Data Width,Address Width,Size of Data...
5.)It gives what are the Ports of your IP (Input & Output) and you can also give the details regarding their Functionality for some special Ports like Interrupts,CLK , Reset as this can be used for Automating Wiring when you click "Run Block Automation" (yeah its saves lot of time for other if you spend it here wisely !)
6.)Addressing and Memory is helpful if you would like to change the Address Space of your Components in the Design , if not required/Sure about it Keep it untouched(No Harm)
7.)Customization GUI gives the flexibility of controlling what ports are to be Displayed in the IP Block fig. and some default Parameters to be Used(if not given/Used)
8.)Review and Package : Its Self Explanatory , Isn't IT , If not Comment on 
Thats It ! You Created your Own IP for your Design.
In the Next post , we will be using this IP on our Design(I already showed it to you in the First figure )
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