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Path to Programmable: Course Syllabus

 

This is NOT a Design Challenge. See Special Note below.

 

The Path to Programmable training project will train five element14 members and provide them with free FPGA/SoC training modules with lab exercises. Once the training has been completed, the trainees will build a project with the MiniZedTM development board based on what they have learned.

In return for both the FREE training and the MiniZedTM development board, the five trainees will blog regularly on element14 to journal about their learning experience, covering both the high points and the challenges of learning to program FPGA/SoC devices. The blogs will be read by the community and the sponsors to learn more about how to make the path to developing with programmable devices easier to realize.

 

Description of Training

The five sponsored trainees will receive 2 training modules, with accompanying training videos, lab exercises, and a MiniZedTM to complete the labs.

 

Here is the course syllabus:

 

Module 1: Developing Zynq All Programmable (AP) SoC Hardware

 

Objectives

  • Understand the Zynq-7000 All Programmable SoC development flow with Vivado’s IP Integrator
  • Introduce the single ARM CortexTm-A9 Processors Cores
  • Explore Robust AXI Peripheral Set
  • Utilize the Xilinx embedded systems tools to
  • Design a Zynq AP SoCSystem
  • Add Xilinx IP as well as custom IP
  • Run Software Applications to test IP
  • Debug an Embedded System

 

Lessons

  • Zynq Overview
  • Xilinx Embedded Tool Flow
  • Zynq Processor Overview
  • Peripherals, Peripherals and more Peripherals!
  • The Power of Tcl
  • Merging the Processing Subsystem (PS) and Programmable Logic (PL)
  • Zynq PS DMA Controller
  • Creating Custom IP
  • Vivado’s Hardware Manager
  • Tcl Scripting
  • What’s Next

 

Module 1 Labs

  • Pre-Lab: Setting Up a Development Platform for Zynq
  • Introduction to Zynq Hardware: Building a Basic Zynq Design
  • Introduction to Zynq Hardware: PS Configuration Part 1 - HelloWorld
  • Introduction to Zynq Hardware: PS Configuration Part 2 MIO Peripherals
  • Introduction to Zynq Hardware: Using Tcl in Vivado Embedded Designs
  • Introduction to Zynq Hardware: Adding a PL Peripheral June 2017
  • Introduction to Zynq Hardware: Improving Data flow between PL and PS utilizing PS DMA
  • Introduction to Zynq Hardware: Adding Custom IP to Vivado IP Catalog
  • Introduction to Zynq Hardware: Hardware Debugging Zynq Designs Xilinx Embedded Tool Flow
  • Introduction to Zynq Hardware: The Power of Scripting using Tcl

 

Module 2: Developing Zynq All Programmable (AP) SoC Software

 

Objectives

  • Introduce developers to Xilinx SDK
  • Explore how SDK makes your job easier
  • Connect SDK to hardware for execution and debug
  • Show a basic example of using the single processor
  • Utilize a peripheral interrupt to show real-time software response

 

Lessons

  • Zynq System Architecture Basics
  • Xilinx SDK Overview
  • Standalone Board Support Package
  • Developing Applications
  • Connecting Hardware and Debugging
  • First Stage Boot Loader
  • Flash Programming and Boot up
  • SDK project management
  • Interrupts
  • Xilinx Libraries
  • Integrating TE Connectivity’s  HTU21DHTU21D Sensor Pmod

 

Module 2 Labs

  • Developing Zynq Software with Xilinx SDK: Pre-Lab Setting Up a Development Platform for Zynq
  • Developing Zynq Software with Xilinx SDK: Explore a Zynq Hardware Platform
  • Developing Zynq Software with Xilinx SDK: Importing the Hardware Platform into SDK
  • Developing Zynq Software with Xilinx SDK: Bare Metal Board Support Package
  • Developing Zynq Software with Xilinx SDK: Develop a Zynq Software Application
  • Developing Zynq Software with Xilinx SDK: Connecting SDK to Hardware
  • Developing Zynq Software with Xilinx SDK: First Stage Boot Loader (FSBL)
  • Developing Zynq Software with Xilinx SDK: Boot from Flash
  • Developing Zynq Software with Xilinx SDK: SDK Project Management
  • Developing Zynq Software with Xilinx SDK: Interrupts
  • Developing Zynq Software with Xilinx SDK: Xilinx Libraries
  • Developing Zynq Software with Xilinx SDK TE  HTU21DHTU21D Pmod Standalone Environment

 

Special Note

The Path to Programmable is NOT a Design Challenge.  It is a professional development training project sponsored by Xilinx in conjunction with the element14 Community. element14 members who submit applications are competing to receive FPGA/SoC training only.

 

For any general questions about the Path to Programmable project, you can post a comment on the About page.

 

To keep up-to-date with the Path to Programmable project, please bookmark this project.

 

The deadline for application submissions is 27 August 2018.

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