SPI - DERs!
Here is the result of driving two MCP23S17 16-bit GPIO drivers using a PSoC 4.
The PSoC4 SPI Master component has a hardware driven SS (Slave Select) signal and it not always appropriate to use it.
For these cases the SS needs to be driven under firmware control.
One such beast is the Microchip MCP23S17 where the its version of SS called -CS needs to be asserted (held low) for a varying number of bytes according to the circumstance.
Since there is a FIFO used for the SPI Master component, the SPI Master's status register must be monitored to ensure that the control of the SS occurs correctly.
The MCP23S17 has a special addressing mode that allows up to 8 MCP23S17s to be driven from the same SPI bus.
This is disabled by default and can be enabled by setting a device configuration bit and tying 3 address pins to the desired value.
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