Help Ben Heck Finish His Portable N64!

No one seems to have addressed the key electrical issue involved in designing or modding a base/concurrent RDRAM memory bus.  Controlled impedance is key, but often misunderstood with a Rambus system from the mid-90s: the impedance varies throughout the different segments of the memory bus, these different impedances must stay conserved.  Only after soldering the RDRAM ICs (capacitance) does the overall characteristic impedance drop down to 51 ohms.  Even the slightest extra solder on the RDRAM’s clock and data pins/pads is enough to cause some instability.

More specifically, the traces before and halfway underneath the RDRAM chips have a higher impedance (Rambus: loaded traces).  The wider traces that extend the memory bus and connect to the jumper/expansion slot have a lower impedance (unloaded) and function as an electrical stub.  The memory bus topology is a bit more unique on the N64: just prior to the termination resistors, the final segment of the memory bus on the back side of the jumper/expansion pack has a higher impedance.

Achieving 51 ohms by soldering through-hole components or different types of equal length wires will prove to be very difficult, but not impossible.  It would probably be easier to trim out portions of the top and bottom sides of the jumper-pak.

The jumper/expansion pak routes two 250 MHz incoming and outgoing clock signals.  When viewing the video, it seemed only the outgoing clock from the RCP is routed, the incoming clock is sourced from a clock generator on the PIF chip side of the board.

I would add that if there is too much capacitance (~33uF) on the immediate VTerm side of the termination resistors, the discharge when shutting off could damage or even destroy RCP.

No one seems to have addressed the key electrical issue involved in designing or modding a base/concurrent RDRAM memory bus.  Controlled impedance is key, but often misunderstood with a Rambus system from the mid-90s: the impedance varies throughout the different segments of the memory bus, these different impedances must stay conserved.  Only after soldering the RDRAM ICs (capacitance) does the overall characteristic impedance drop down to 51 ohms.  Even the slightest extra solder on the RDRAM’s clock and data pins/pads is enough to cause some instability.

More specifically, the traces before and halfway underneath the RDRAM chips have a higher impedance (Rambus: loaded traces).  The wider traces that extend the memory bus and connect to the jumper/expansion slot have a lower impedance (unloaded) and function as an electrical stub.  The memory bus topology is a bit more unique on the N64: just prior to the termination resistors, the final segment of the memory bus on the back side of the jumper/expansion pack has a higher impedance.

Achieving 51 ohms by soldering through-hole components or different types of equal length wires will prove to be very difficult, but not impossible.  It would probably be easier to trim out portions of the top and bottom sides of the jumper-pak.

The jumper/expansion pak routes two 250 MHz incoming and outgoing clock signals.  When viewing the video, it seemed only the outgoing clock from the RCP is routed, the incoming clock is sourced from a clock generator on the PIF chip side of the board.

I would add that if there is too much capacitance (~33uF) on the immediate VTerm side of the termination resistors, the discharge when shutting off could damage or even destroy RCP.

I refer you to my earlier comment.