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Documents Program Your Own FPGA Video Game -- Episode 353
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  • Author Author: tariq.ahmad
  • Date Created: 2 Aug 2018 4:48 PM Date Created
  • Last Updated Last Updated: 3 Aug 2018 7:24 AM
  • Views 5301 views
  • Likes 20 likes
  • Comments 17 comments

Program Your Own FPGA Video Game -- Episode 353

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Program Your Own FPGA Video Game

element14 Presents  |  Andy West's VCP Profile |  Project Videos

 

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In this video, we learn how to make a retro-style table tennis game with an FPGA. We take a look at the DE0-Nano development board, along with Altera's Quartus II design software. We also learn about the Verilog language and dive into some code. Finally, with the help of some additional components, we interface directly with a VGA monitor and an NES game controller.

 

 

Product NameQuantity
Buy Kit

P0082 -  Development Kit, FPGA, DE0-Nano, 2x GPIO Headers, 32MB RAM, Accelerometer

1Buy Now

GS-630A -  Breadboard, ABS, 56 mm x 136 mm x 10 mm

1Buy Now

1739 -  Large Enclosed Piezo Element w/Wires

1Buy Now

OS-9975 -  Replacement NES Wired Controller

1Buy Now

Sub Connector High Density 15 Contacts Receptacle DE High Density Series Metal Body Solder

1Buy Now

826 -  Premium Female/Male Extension Jumper Wires, 40 x 6" (150mm)

1Buy Now
MC001810 -  Jumper Wire Kit, Multicolor, 2 mm - 125 mm, 22 AWG, 140 Piece1Buy Now
Female NES Controller Connector1
270 Ohm Through Hole Resistor3Buy Now

 

Click Herefor access to all the supporting files you will need to replicate this build!
  • fpga development
  • programmablelogicch
  • nes controller
  • 270 ohm through hole resistor
  • pong
  • piezo element
  • fpga development board
  • fpga
  • breadboard
  • vcpfpga
  • piezo
  • de0-nano
  • nes wired controller
  • field programmable gate arrays
  • female nes controller connector
  • d sub connector
  • vcp
  • e14presents_andywest
  • friday_release
  • jumper wires
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Top Comments

  • DAB
    DAB over 7 years ago +2
    Nice introduction to the internal part of an FPGA. I liked the walk through of the software and how to build the hardware descriptions. DAB
  • jomoenginer
    jomoenginer over 7 years ago +2
    Oh, cool! A Ben Heck cameo. This is really cool. I've been meaning to create a FPGA game so this might be a great place to start. Yeah, I know some FPGA folks that hate being called Software Engineers…
  • baldengineer
    baldengineer over 7 years ago +2
    Nicely done on your tutorial. FPGAs are that next-level factor that I think many electronics enthusiasts and professionals need. I think it was clever to combine teaching about them with an NES controller…
  • pmartiner
    pmartiner over 5 years ago

    Hi!

    I'm new to FPGAs, Digital systems and Verilog.

    I have a question.

    Does the game use any type of register? If that is the case, how does it use it?

    Thank you very much!

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  • Fred27
    Fred27 over 6 years ago in reply to andywest

    This certainly didn't seem like your first Verilog. I'm even more impressed. Even if (worst case) the screen is shifted over by a pixel I'm not sure it would matter. The horizontal porch should prevent any weird wraparound effects.

     

    I'm currently looking at my own VGA game - inspired by your post and some others I've found online that take a different approach for some of it. I like the way you've broken out the components. Once I feel I know a little more I might feel I'm in a better position to contribute.

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  • andywest
    andywest over 6 years ago in reply to Fred27

    Thanks for your question! Yes, you're probably right about the delay. Please note that this was the first Verilog code I ever wrote, right after blinking an LED, so I'd be surprised if there weren't a few bugs. Fortunately it was "good enough" to produce a stable display.

     

    The code is under the MIT License so you're welcome to modify and share it freely. Some day if I have the time I'll go back over it with a fine-tooth comb.

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  • Fred27
    Fred27 over 6 years ago

    Firstly, thanks for a great project which was well explained. I know this is a few months old have a question and I'm hoping somebody might have a gem of wisdom. Vga.v and Renderer.v are both clocked. The screen position is output from Vga and fed to rendered. The pixel colour is output from Renderer and fed to Vga. The relevant bit of the code are summarized below. I know Verilog isn't the same as sequential code, but wouldn't this give a one clock cycle delay calculating the colour for the position?

     

    module Vga(
         input pixelClock,
         input [2:0] activePixel,
         output reg [15:0] screenX,
         output reg [15:0] screenY
    );
    
    always @(posedge pixelClock)
    begin
         screenX <= [calculated];
         screenY <= [calculated];
    end
    endmodule

     

    module Renderer(
         input pixelClock,
         input [15:0] screenX,
         input [15:0] screenY,
         output reg [2:0] screenPixel
    );
    
    always @(posedge pixelClock)
    begin
      screenPixel <= [calculated from various inputs including screenX and screenY]
    end
    endmodule

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  • hbelkasmi
    hbelkasmi over 6 years ago

    HELLO,

    I am trying to do the same thing but with the DE10-NANO board, I tried to change the corresponding PINS but still no sound when I press the KEY 0 and KEY1.

    all your advices are welcome

    Thanks in advance

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  • andywest
    andywest over 6 years ago in reply to gsharpe

    Hey, gsharpe! It's always great to hear from people trying the project themselves. Thanks for sharing your experience using an unofficial NES controller. I also used a "replacement" controller. I wonder if anyone has tried an original, 30-year-old gamepad? Anyway, glad to hear you enjoyed the video and thanks again for sharing these workarounds with the community!

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  • gsharpe
    gsharpe over 6 years ago

    Great video!  I learned quite a bit while recreating the project on my board and, as luck would have it, ran into a problem when trying to make use of a cheap knockoff version of the NES controller.  I found that when pressing the right arrow button, it would register both the right arrow (last bit of the shift register) AND the 'a' button (first bit of the shift register).  With the original project timing for the controller, I tried to investigate the knockoff's strange behavior.  When pressing the 'a' button, it appeared to asynchronously latch properly as would be done with the CD4021 shift register of the original controller, but if the right arrow was pressed, the output remained low through the next latch pulse and the output would not change until the first clock pulse rising edge when the 'b' button value shifted out.  I still don't know why it behaves this way, but I found two methods for a workaround.  The first and simplest is by setting the 'CONTROLLER_PULSE <= 1;' in the idle state of the NesController.v file's state machine, so that the clock signal is normally high.  The other way that worked was to add another state which added an extra clock pulse.  Either way just meant there were eight rising edges instead of seven for each readout and this works for both the original and knockoff versions.  I hope this helps anyone who encounters this issue!

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  • andywest
    andywest over 7 years ago in reply to ravelox

    That's great! Enjoy your new FPGA board and let us know what cool things you create.

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  • ravelox
    ravelox over 7 years ago in reply to andywest

    Thanks for the information. I'm up and running image

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  • genebren
    genebren over 7 years ago

    Very well done!  This was a great project and your results are great.  You did a very good job walking the viewers through the steps, introducing concepts and demonstrating the results.

    Thanks!

    Gene

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