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  • Author Author: tariq.ahmad
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Program Your Own FPGA Video Game -- Episode 353

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Program Your Own FPGA Video Game

element14 Presents  |  Andy West's VCP Profile |  Project Videos

 

In this video, we learn how to make a retro-style table tennis game with an FPGA. We take a look at the DE0-Nano development board, along with Altera's Quartus II design software. We also learn about the Verilog language and dive into some code. Finally, with the help of some additional components, we interface directly with a VGA monitor and an NES game controller.

 

 

Product NameQuantity
Buy Kit

P0082 -  Development Kit, FPGA, DE0-Nano, 2x GPIO Headers, 32MB RAM, Accelerometer

1Buy Now

GS-630A -  Breadboard, ABS, 56 mm x 136 mm x 10 mm

1Buy Now

1739 -  Large Enclosed Piezo Element w/Wires

1Buy Now

OS-9975 -  Replacement NES Wired Controller

1Buy Now

Sub Connector High Density 15 Contacts Receptacle DE High Density Series Metal Body Solder

1Buy Now

826 -  Premium Female/Male Extension Jumper Wires, 40 x 6" (150mm)

1Buy Now
MC001810 -  Jumper Wire Kit, Multicolor, 2 mm - 125 mm, 22 AWG, 140 Piece1Buy Now
Female NES Controller Connector1
270 Ohm Through Hole Resistor3Buy Now

 

Click Herefor access to all the supporting files you will need to replicate this build!
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  • Great video!  I learned quite a bit while recreating the project on my board and, as luck would have it, ran into a problem when trying to make use of a cheap knockoff version of the NES controller.  I found that when pressing the right arrow button, it would register both the right arrow (last bit of the shift register) AND the 'a' button (first bit of the shift register).  With the original project timing for the controller, I tried to investigate the knockoff's strange behavior.  When pressing the 'a' button, it appeared to asynchronously latch properly as would be done with the CD4021 shift register of the original controller, but if the right arrow was pressed, the output remained low through the next latch pulse and the output would not change until the first clock pulse rising edge when the 'b' button value shifted out.  I still don't know why it behaves this way, but I found two methods for a workaround.  The first and simplest is by setting the 'CONTROLLER_PULSE <= 1;' in the idle state of the NesController.v file's state machine, so that the clock signal is normally high.  The other way that worked was to add another state which added an extra clock pulse.  Either way just meant there were eight rising edges instead of seven for each readout and this works for both the original and knockoff versions.  I hope this helps anyone who encounters this issue!

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  • Great video!  I learned quite a bit while recreating the project on my board and, as luck would have it, ran into a problem when trying to make use of a cheap knockoff version of the NES controller.  I found that when pressing the right arrow button, it would register both the right arrow (last bit of the shift register) AND the 'a' button (first bit of the shift register).  With the original project timing for the controller, I tried to investigate the knockoff's strange behavior.  When pressing the 'a' button, it appeared to asynchronously latch properly as would be done with the CD4021 shift register of the original controller, but if the right arrow was pressed, the output remained low through the next latch pulse and the output would not change until the first clock pulse rising edge when the 'b' button value shifted out.  I still don't know why it behaves this way, but I found two methods for a workaround.  The first and simplest is by setting the 'CONTROLLER_PULSE <= 1;' in the idle state of the NesController.v file's state machine, so that the clock signal is normally high.  The other way that worked was to add another state which added an extra clock pulse.  Either way just meant there were eight rising edges instead of seven for each readout and this works for both the original and knockoff versions.  I hope this helps anyone who encounters this issue!

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