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Blog Q&A from Elektor Academy - DSP-All-Easy
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  • Author Author: doctorcdf
  • Date Created: 1 Apr 2014 4:04 PM Date Created
  • Views 269 views
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  • elektor
  • elektor_academy
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Q&A from Elektor Academy - DSP-All-Easy

doctorcdf
doctorcdf
1 Apr 2014
View the Webinar Video
Q: What output noise level could one hope to achieve? Is this limited by the AD chip or by other components?
The ADAU1701 datasheet specifies the A-weighted S/N noise at 104dB. This is therefore the best you can achieve and is limited by the AD chip.
Q: What is the maximum stop band attenuation achievable?
The stopband attenuation characteristics of a filter is determined primarily by the transfer function (e.g. Butterworth, Bessel etc) and not so much by the hardware implementation per se.
Q: Are we covering only selfboot or are you going to talk about ucontroller mode? SigmaStudioFW.h macro (*writing a function to  control a filter)
This presentation and the Elektor Universal DSP board are designed around the self-boot mode.
Q: I really wanted to see the process of placing the code onto the board  - any more information?
The gory details of this - with multiple methods to do so - are described in the Elektor article in the Jan/Feb 2014 issue.
Q: What is the highest sample rate please? and also what is the highest bit depth? And what clocking speed would be required to run that(approximately)?
The maximum sample rate supported by the ADAU1701 is 192kHz.(However in TDM mode the chip can only act as a slave at 192kHz.) Resolution of ADC/DAC are 24 bits.
Q: Can I use the generated *.hex and burn my eeprom with something like a PICKIT?
The gory details of this - with multiple methods to do so - are described in the Elektor article in the Jan/Feb 2014 issue.
Q: Any advice when it comes to input/output buffering?
The input resistors in the default design are 18k. Good for most cases. The output filtering in the default design uses a passive filter as shown on the datasheet (self-boot schematic), so if you are planning to feed a low-impedance stage you can choose to substitute that with the opamp-based filter shown.
Q: What latency time in ms may we expect from an input to the output with not too complicated dsp tasks?
The complete ADC-DSP-DAC path, as I gather from information on the SigmaStudio forums, has a group delay of ~50 samples, or 1 ms @ 48 kHz.
Q: You didnt talk about phase response (response in time domain), Is it easy to control this?
The phase response of a filter is primarily a function of the transfer function (Bessel, Butterworth etc), rather than that of the hardware implementation.
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