Thursday, June 13th, 2013
9.00 am – 12.30 pm
Memory Hotel, konferensrum Kaptenen
Borgarfjordsgatan 3
164 25 Kista


Seminar Registration:

To register for the seminar please visit:



Participation is free of charge. A light lunch and refreshments will be served.

The seminar is relevant for design & verification managers and engineers and semiconductor professionals.


Agenda and Speakers' Topics:


9.00 am – 9.15 am Introduction of Airics and HDL Design House

Ulf Orrebrink, Airics General Manager and co-founder


9.15 am - 10.00 am       HDL Design House Products and Services Overview

Bogdan Bizic, HDL Desgin House Managing Director


10.00 am - 10.45 am Background, Motivation & Trends in Verification

Olivera Stojanovic, Senior Staff Verification Engineer


10.45 am - 11.00 am Coffee Break


11.00 am - 11.45 am      HDL Design House Verification Flow and Experience

Olivera Stojanovic, Senior Staff Verification Engineer


11.45 am - 12.00 pm      Q&A


12.00 pm – 12.30 pm Lunch



For more information please contact Milena Jovanovic m-jovanovic@hdl-dh.com