If you could automate one part of your design workflow, what would it be? We are asking e14 in our Join, Share & Win Competition

If I could automate one thing in my design workflow, it would be the whole timing closure issue. You know that feeling when you have a design that works perfectly in simulation, and then you run it through the synthesis tools only to find you’re missing timing by 3 nanoseconds on some random path you didn't even know existed? Yeah, that’s it.

I remember this one time, must've been quite a while back, I was working on an image processing pipeline for a camera system. The design looked pretty good, or so I thought. It had a nice modular structure and was well pipelined, with simulations showing promising results. When I ran the first build, though, timing violations popped up everywhere. I spent the entire day trying to figure out what was wrong. I added pipeline stages, adjusted synthesis attributes, and reorganized some logic. Each build takes about 30 to 40 minutes, so I make a change, grab a drink, come back, check the report, mutter under your breath, and repeat.Finally, after going through the iterations, I was reviewing the timing report for probably the ninth time. I noticed this path that made no sense. It went from a data register in one processing block, passing through half the design, then into some control logic that shouldn’t even interact with that data. After another hour of digging through the elaborated design, I discovered the issue. There was a simple debug signal I had added weeks earlier during development. It just combined a bunch of status flags from different modules for easier probing. I completely forgot it was even there. The tools routed this signal across the whole block, and since it touched logic in different clock domains, it created all these incorrect timing dependencies.So after fixing it up, ran the build again, and everything passed with 2 nanoseconds of slack. I sat there laughing at myself. Four hours, probably eight synthesis runs, and it was just one forgotten debug signal. What would make a real difference is if the tools could communicate in plain language about these issues. Instead of saying, "path from inst_47/gen_block[3]/data_reg to inst_892/ctrl_logic/state_reg fails by 1.2ns," how about saying, "Hey, your debug signal 'all_status_flags' is connecting unrelated logic and causing timing problems is probably not what you intended?" , since the code's already commented out, it checks the debug reg block signals instead of giving me the raw netlist regs. Or when it detects a critical path, it could suggest specific fixes based on the actual code structure. For example, "This path has too much combinational logic between registers, so consider adding a pipeline stage after the multiplier on line 156." These kinds of automated, source code aware suggestions would save so much time instead of going through multiple reports and browsing the designs, which honestly takes forever. The elaborated designs are massive and take minutes just to load in the GUI, and navigating through them without the GUI using just text reports is like reading the Matrix.

Another big time drain is managing constraint files. Every project feels like it takes at least half a day to set up the XDC or SDC files. I need to ensure all the clocks are defined correctly, the I/O standards match the schematic, and the pin assignments are accurate. Then, the hardware team always seems to change something on the board, or I switch to a different FPGA variant, and I have to go through it all again. I’ve definitely spent hours debugging strange behavior only to find a pin got swapped in the constraints.It would be great if there was automated integration between the schematic tools and FPGA constraints. For instance, the hardware team exports a latest version of schematic, that automatically generates or updates the constraint file with the correct pin mappings and I/O standards. It should also validate against the FPGA's capabilities like, "Hey, you're trying to put a 3.3V signal on a 1.8V bank; that's not going to work." , these basic automated checks would save a lot of time before wasting a synthesis/implementation run.

The solution you have suggested is what I am proposing to the vendor. I'm getting push-back as security overkill.

In another career I was part of a forensic audit on a company that was attacked via the air conditioner monitoring that was publicly available. 5G of data passed through the AC monitor setting off an alarm. Someone had bridged the AC monitor network with the corporate LAN. Ouch! 

I'm anal when it comes to publicly exposed devices, maybe a little to anal.

That's why we always put those "untrusted" devices in a DMZ and a reverse proxy handles the communication with the outside world. That RP only talks HTTPS with the outside world and is even responsible for authentication before any traffic is sent to the untrustable device. 

I’m going to throw another hat in the ring for the automated design challenge, under the category of security. Establishing a list of security categories is a challenge. Cybersecurity, physical security, personal security, and financial security, the list is extensive.

In my design of networks, I focus considerable effort on cybersecurity. An appropriate example comes from the small company I work for part-time.  Computer network design: Replacing the coffee-break napkin discussion.  They are deploying a scale head indicator in the IP network that has web capabilities. The equipment vendor says IT security is not a concern.

My IT security spider sense tingled when I read the specifications for the device. (It is a computer but no one calls it that.) I’m told that , since it only holds scale data, security is not a concern. It has a ModBus/TCP interface for data extraction that has no controls. The device only supports http protocol. The only access control is for the configuration menu option. Anyone with a browser can access it. Hum-mm a publicly available interface that has no controls deployed inside the corporate network. Yeah, I shouldn’t be concerned about that. 

The owners support security concerns. They have worked with me to upgrade the network. I’ve raised my hand on several initiatives asking for security to be considered. The vendors reluctantly come back with a solution; they still don’t recommend.

It would be nice to have a hopper that would cull the project for security concerns and solutions. I used chatgpt’s as such a hopper to get me some idea of knowing what I don’t know. The realization of the unseen is when you discover you ought to have examined that.

Arthur Ganson's 'machine with concrete' kinetic sculpture perhaps could be another contender.

The rest of us watch the Pitch Drop experiment

From "global point of view"...

I use AI for problem analysis, brainstorming and other preliminary investigations. It's essential part to make result unique and feature-balanced. AI works pretty well with text info, but is absolutely cursed with trivial schematic drawing (it draws like a painter, not like an engineer). AFAIK, it's technically possible to solve that with post-training, but nobody did that yet.

Another point (already not a problem for me) - make open-source projects "accessible with ease" for non-professional users. All starts with "stupid" question "how to see you schematic right now", then "how to buy components with couple of clicks and without mistakes". Finally modified my process for easyeda+jlcpcb+lcsc. Less featured than Kicad, but total synergy effect is huge. It would be nice, if alternate tools could provide more effective solutions for documents publishing, BOM maintenance, versioning.

And the last - may be i don't know something, but have never seen good tools to work with schematic/PCB in collaborative mode. I mean, when you can see changelog - all that should be done manually now, and not as effective as working with code on GitHub.

Search: "centrifugal tube" on AliExpress (boxes are usually sold separate).

No room to text on top, but for sorted series (res, cap) - may be an acceptable trade-off for huge density.

Label printer for texts, nylon tape for such small radius to stick well.

Amazing project.  I especially love the mechanism, driven by the solenoid, that pushes the doors out from behind.

I was considering using it for tapes with SMD pasives. I needed to store more in single bin, but at the same time to speed search in multiple bins (lower number of values in single bin). This device was intended to be faster first step (for selecting right bin to search in).

Later I started using chinese 1$ storage boxes with 15 cells and cutting tapes to fit it