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Learning FPGA

danielpgleason

Does anyone know of any good learning resources about how to start learning FPGA? I've been a software engineer for several years and the FPGA world is quite new to me. I'm trying to implement RMII but have been struggling a lot. I purchased a logic analyzer but I don't know what I'm looking at. I need something that will tell me how to properly understand and read datasheets, know how to debug signals, how to understand what VHDL is good and what is bad. How to read RTL generations..Etc

I'm starting from the beginning. Any resources or materials are greatly appreciated. 

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  • This might be controversial but I think the best way to learn FPGA is not to jump into the HDL languages right away.  If you are using the Altera environment use their block diagram editor which allows you to string together logic gates and flip flops in a schematic.... but don't stop there... use their wizard to create parametrized counter and compare blocks.  You may have heard that unlike software, FPGAs are parallel.. well that is true, but you can create sequences by decoding count values (of a clocked counter) for instance... or you can have a series of interdependent clocked registers that only advance when certain conditions occur.  I would spend a month to see what can be accomplished with counters, gates and compare blocks before moving to HDL.  The behavior of your designs can be tested using ModelSim (which I assume is still packaged with their software) or if you are working with a development board on Signal Tap II (their embedded logic analyzer) 

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  • This might be controversial but I think the best way to learn FPGA is not to jump into the HDL languages right away.  If you are using the Altera environment use their block diagram editor which allows you to string together logic gates and flip flops in a schematic.... but don't stop there... use their wizard to create parametrized counter and compare blocks.  You may have heard that unlike software, FPGAs are parallel.. well that is true, but you can create sequences by decoding count values (of a clocked counter) for instance... or you can have a series of interdependent clocked registers that only advance when certain conditions occur.  I would spend a month to see what can be accomplished with counters, gates and compare blocks before moving to HDL.  The behavior of your designs can be tested using ModelSim (which I assume is still packaged with their software) or if you are working with a development board on Signal Tap II (their embedded logic analyzer) 

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