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  • Author Author: billabott
  • Date Created: 14 Aug 2013 11:42 PM Date Created
  • Views 1018 views
  • Likes 1 like
  • Comments 8 comments
  • fpga
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Exploring FPGAs

billabott
billabott
14 Aug 2013

Thanks to a wonderful fellow engineer, Mr. Shabaz, I now have a KNJN.com Pluto II FPGA board with an Altera Cyclone installed to experiment with.  It seems to offer the same kind of fun exploration and experimentation as many of the microcontroller boards do.  The web site, http://www.fpga4fun.com/, is a very useful site that I am working through while testing these unknown waters.  The first project I undertook was one to blink the LED on the Pluto II: http://www.fpga4fun.com/QuartusQuickStart.html.  By following the instructions given and taking care to note which pin (PIN_10) has the clock0 signal available on this particular FPGA chip (EP1C3T100C8) and which pin (PIN_25) is connected to the LED, I managed a achieve the desired result of getting Altera's Quartus II to sucessfully compile the simple Verilog HDL file named ledblink.v.  The next step will be to actually flash the raw binary file, ledblink.rbf, into the onboard boot rom using my older Dell Lattitude D630 laptop which has the required RS-232 port available since the TXDI serial interface uses that DB-9 to communicate to and from the FPGA.  Interesting to note that the compiler creates 70+ small files all sharing the ledblink name prefix.

 

module ledblink(

          input clk,

          output LED

          );

 

reg [23:0] count;                      //  declares a 24 bit variable named 'count'


always @(posedge clk)   //  Procedure occurs only when trailing 'post' edge of clock is detected

begin

     count <= count + 24'd1;  //  the constant being added is 24 bit decimal whose value is 1

end                                           //  it will rollover and reset to zero after 2^24 clock cycles

                                          

assign LED = count [23];     //  the LED is controlled by the high order bit of the variable 'count'

                       // the LED is off for 'count' < 2^23   and is on for 'count' >= 2^23;  gives 50% duty cycle                 

                        //  AND continous evaluation of control bit and update of output register

endmodule

 

 

image

EP1C3T100C8 Datasheet: http://www.altera.com/literature/hb/cyc/cyc_c5v1.pdf

 

Post blog trivia questions:

Q1:  What single parameter can be altered to either increase or decrease the period of the LED's blinking?

Q2:  What other parameter can be altered to decrease the period of the LED's blinking?

 

Happy Trails to you!

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  • billabott
    billabott over 12 years ago

    I was thinking about a booster pack to add a FPGA to the Stellaris Launchpad (EK-LM4F120XL).  How difficult are the power supply issues for home made fpga boards?   I found this on TI site: http://www.ti.com/lit/an/snva267a/snva267a.pdf .  Also is their a possiblity of using the TI USB programmer to update the FPGA on the booster pack by moving a jumper or something instead of using the regular ISCP for the FPGA?  I have gathered that the FPGA has high value currently in achieving quick updates to graphical display screens.  Are there other areas in robotics/automation where the speed of FPGA meets the need for speed?

     

    Likely Useful Resource: http://www.ti.com/lit/an/slaa535a/slaa535a.pdf

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  • billabott
    billabott over 12 years ago

    First came www.fpga4fun.com.

    Not to be forgotten is the real purpose of digital automation: Arcade Games!

    http://www.fpgaarcade.com/   using FPGA.

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  • billabott
    billabott over 12 years ago

    I have discovered how to purchase the UP2 Education Board from Altera with supporting CD and extras for $149.00.  http://users.ece.gatech.edu/~hamblen/book/up2form.pdf

    That may be old dated info so the true source may actually be:

    http://www.altera.com/education/univ/members/purchase/unv-purchase-info.html?GSA_pos=1&WT.oss_r=1&WT.oss=university%20program%20order%20form

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  • billabott
    billabott over 12 years ago

    No Drooling allowed!

     

    http://www.dinigroup.com/new/DNBFC_S12_12_Cluster.php

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  • billabott
    billabott over 12 years ago in reply to shabaz

    Yes, I would like to have Verilog Gold pdf.  If you have time to provide a workable link.  Thanks.

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