element14 Community
element14 Community
    Register Log In
  • Site
  • Search
  • Log In Register
  • Community Hub
    Community Hub
    • What's New on element14
    • Feedback and Support
    • Benefits of Membership
    • Personal Blogs
    • Members Area
    • Achievement Levels
  • Learn
    Learn
    • Ask an Expert
    • eBooks
    • element14 presents
    • Learning Center
    • Tech Spotlight
    • STEM Academy
    • Webinars, Training and Events
    • Learning Groups
  • Technologies
    Technologies
    • 3D Printing
    • FPGA
    • Industrial Automation
    • Internet of Things
    • Power & Energy
    • Sensors
    • Technology Groups
  • Challenges & Projects
    Challenges & Projects
    • Design Challenges
    • element14 presents Projects
    • Project14
    • Arduino Projects
    • Raspberry Pi Projects
    • Project Groups
  • Products
    Products
    • Arduino
    • Avnet Boards Community
    • Dev Tools
    • Manufacturers
    • Multicomp Pro
    • Product Groups
    • Raspberry Pi
    • RoadTests & Reviews
  • Store
    Store
    • Visit Your Store
    • Choose another store...
      • Europe
      •  Austria (German)
      •  Belgium (Dutch, French)
      •  Bulgaria (Bulgarian)
      •  Czech Republic (Czech)
      •  Denmark (Danish)
      •  Estonia (Estonian)
      •  Finland (Finnish)
      •  France (French)
      •  Germany (German)
      •  Hungary (Hungarian)
      •  Ireland
      •  Israel
      •  Italy (Italian)
      •  Latvia (Latvian)
      •  
      •  Lithuania (Lithuanian)
      •  Netherlands (Dutch)
      •  Norway (Norwegian)
      •  Poland (Polish)
      •  Portugal (Portuguese)
      •  Romania (Romanian)
      •  Russia (Russian)
      •  Slovakia (Slovak)
      •  Slovenia (Slovenian)
      •  Spain (Spanish)
      •  Sweden (Swedish)
      •  Switzerland(German, French)
      •  Turkey (Turkish)
      •  United Kingdom
      • Asia Pacific
      •  Australia
      •  China
      •  Hong Kong
      •  India
      •  Korea (Korean)
      •  Malaysia
      •  New Zealand
      •  Philippines
      •  Singapore
      •  Taiwan
      •  Thailand (Thai)
      • Americas
      •  Brazil (Portuguese)
      •  Canada
      •  Mexico (Spanish)
      •  United States
      Can't find the country/region you're looking for? Visit our export site or find a local distributor.
  • Translate
  • Profile
  • Settings
Personal Blogs
  • Community Hub
  • More
Personal Blogs
Legacy Personal Blogs Filter Coefficient Translator
  • Blog
  • Documents
  • Mentions
  • Sub-Groups
  • Tags
  • More
  • Cancel
  • New
  • Share
  • More
  • Cancel
Group Actions
  • Group RSS
  • More
  • Cancel
Engagement
  • Author Author: dhmarinov
  • Date Created: 23 Aug 2019 4:52 PM Date Created
  • Views 1923 views
  • Likes 7 likes
  • Comments 8 comments
  • 2's complement
  • fixed point
  • c
  • fir
  • vhdl
  • translator
  • matlab
  • coefficients
  • floating point
  • filters
  • iir
Related
Recommended

Filter Coefficient Translator

dhmarinov
dhmarinov
23 Aug 2019

Hello there,

 

Lately I have been working a lot with filter design and implementation on FPGA.

As you know the most common way to design a filter is through MATLAB or a suite with the similar capabilities.

Either way the produced result is an array of floating point values. FDAtool has the ability to translate the values from decimal

to binary floating point, however, if the implementation is in fixed point, then this functionality is useless.

In order to make use of the coefficients, they have to be represented as 2's complement.

At first I used to translate each value by making use of the online decimal-to-2's complement converters, but as you can imagine

this can get quite tedious. To combat this problem I developed a simple Python program, which does the whole work (almost) in a click of a button.

 

image

 

The concept is quite simple:

 

1.Browse to the filter coefficient file (.fcf) or any other file containing decimal values that range between 0.999 and -0.999.

There has to be only one value per row!

 

2. Chose the desire structure of the output file.

2.1 Array will return the data enclosed in a VHDL, Verilog or C array. The options to select the language are available only for the array option.

2.2 List will return a list of values. Chosing this option gives the user the opportunity to enter a separator between the values.

 

3. There are 4 possible output formats - binary, hexadecimal, signed and unsigned integer.

All of them represent the equivalent of the 2's complement value.

 

4. Elements per line determines how many values are ther per row in the output file.

 

5. Output bit width determines the desired bit length of the output product.

If the selected format is hexadecimal and the selected bit width is not multiple of 4, then the output width will be extended to the next value multiple of 4.

 

6. File extention sets the type of the output file - typical choice is text (txt), however, by using a data format (data), the user can

create a list of values that can be used to initialize block RAMs in Vivado.

 

7. The Translate button creates the output product.

 

8. The console in the bottom displays various information such as data that has been rejected by the translator in the form of warnings,

tips about the input file, and errors.  

 

Done!

 

Here is a video demonstarion:

 

You don't have permission to edit metadata of this video.
Edit media
x
image
Upload Preview
image

 

You can it from my Github.

Enjoy image

 

PS: A small update on 26.09.2019 was done on the Git repository - all files except the source code and the application were removed.

  • Sign in to reply

Top Comments

  • dhmarinov
    dhmarinov over 5 years ago in reply to clem57 +2
    Sorry it was in private mode. Can you try again? https://github.com/DHMarinov/Coefficient_Translator
  • dhmarinov
    dhmarinov over 5 years ago in reply to genebren +1
    Sounds cool, but didn't that have an influence on the frequency response , or it was insignificant?
  • michaelkellett
    michaelkellett over 5 years ago

    Thanks for posting - I usually write something in MATLAB to do the job.

     

    I'll take a peep at yours when I get  a moment.

     

    MK

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • More
    • Cancel
  • genebren
    genebren over 5 years ago in reply to dhmarinov

    The goal is to minimize the effects by choosing integer coefficients and divisor (or shift) that produces the minimal error.  It most cases, the filters have been a close fit to the desired characteristics.

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • More
    • Cancel
  • dhmarinov
    dhmarinov over 5 years ago in reply to clem57

    Perfect,

    I'll appreciate ityou give me some feedback, maybe also some ideas for further improvements image.

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • More
    • Cancel
  • clem57
    clem57 over 5 years ago in reply to dhmarinov

    Works. TY

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • More
    • Cancel
  • dhmarinov
    dhmarinov over 5 years ago in reply to genebren

    Sounds cool, but didn't that have an influence on the frequency response , or it was insignificant?

    • Cancel
    • Vote Up +1 Vote Down
    • Sign in to reply
    • More
    • Cancel
>
element14 Community

element14 is the first online community specifically for engineers. Connect with your peers and get expert answers to your questions.

  • Members
  • Learn
  • Technologies
  • Challenges & Projects
  • Products
  • Store
  • About Us
  • Feedback & Support
  • FAQs
  • Terms of Use
  • Privacy Policy
  • Legal and Copyright Notices
  • Sitemap
  • Cookies

An Avnet Company © 2025 Premier Farnell Limited. All Rights Reserved.

Premier Farnell Ltd, registered in England and Wales (no 00876412), registered office: Farnell House, Forge Lane, Leeds LS12 2NE.

ICP 备案号 10220084.

Follow element14

  • X
  • Facebook
  • linkedin
  • YouTube