256 x 12 RAM

Yes, as long as you make sure the unused data bits are properly terminated so that you do not get any ESD issues.

DAB

Sorry I wrote ROM not SRAM (it cant be volatile).

Could I combine two  256 x 8 SRAM's and get a 256 x 16?

Tim

I think you have this:

     So data would be only 12 bits not 16.

It could be also:

     1st ROM uses bits 0-3 and 4-7 or each 4 bit word PLUS

     2nd ROM uses bits 0-3 and 4-7 are don't care.

Take your pick,

Clem

PS. you may want to look at Intel 4004 for guidance: https://en.wikipedia.org/wiki/Intel_4004

and history where the designer Federico Faggin was disowned by Intel The Intel 4004 Home

found a listing  instructions http://www.intel.com/Assets/PDF/DataSheet/4004_datasheet.pdf

Clem

I am using 15 instructions.  And the ALU can add and subtract.

The instruction decoder and control logic are separated from the rest of the computer and do not share the memory or data bus.

Are you using an Arduino? Or basic Logic from something like an FPGA?

C

I am only using basic logic,counters,adders etc. And memory.

SRAM is volatile unless it has a battery backup.

Presumably you need non-volatile memory with a parallel interface.

It will be tough to get modern memory chips this small so you could end up with unused memory space.

As mentioned two 8 bit memories will work for a 12 bit requirement, just 4 bits will be unused.

You could use a dual-port static RAM with battery-backup which would allow an external device to load or monitor the memory.

Or you could use FRAM - you would need 2 chips like FM16W08-SGTR - this is non-volatile RAM with a parallel interface.

For your application:

• connect 8 address lines in parallel and ground the unused address lines
• use 4 bits of one FRAM to store op-codes, connect the 4 unused data pins to 100K pull-down resistors
• The second FRAM would store 8-bit addresses.

timswift wrote:

 

I am only using basic logic,counters,adders etc. And memory.

I would suggest looking into an FPGA as a cheap and easy way (once you've come up the learning curve ) to implement logic and memory.  A simple CPU is well suited to the Lattice iCE40 which is the only FPGA I know of that has open-source tools (IceStorm).  There's a really nice low-cost development board (Lattice iCEstick) that unfortunately seems to be out of stock everywhere.  There's a nice educational development board (Nandland Go Board) that completed its Kickstarter funding a month ago and is now in production.  The Nandland web site has good tutorial material for new FPGA users.

I don't know why iCEstick seems to be out of stock so much.  I suspect Lattice loses money on each one sold, and they're being snapped up by hobbyists who use them for one-of-a-kind projects and learning about FPGAs and don't go on to buy iCE40 chips in 100K quantities for commercial products.

You can get started with FPGAs at no cost by simulating your CPU design and waiting to buy an actual FPGA board until your CPU design works.

Yes, RAM or ROM, all you need to do is provide an address bus to select the byte and a clock to latch the data inside the device to the pins on your MCU to read.

In my bit slice days, we did a lot of this type of circuits to get odd data segments.

DAB