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AUBoard-15P onboard JTAG adapter stability issue

MkE

Hello,

On a newly purchased AUBoard-15P wirth original reference design loaded with no changes, we have stability issue with JTAG connection while using the onboard FTDI. The board is discovered in Vivado HW Manager initially, but after few minutes, the JTAG connection starts cycling on and off with pop-up in Vivado with "No HW target open" that promptly dissapears - with about 1-2s interval.

Sysmon data is getting corrupted with zero values being inserted in the plots. After some time Vivado crashes due to this problem.

The setup was tested with four different USB cables, three desktops, Vivado 2023.2 and 2024.2 both on Linux and Windows. FTDI drivers are updated to latest version.

Measured internal temperature of FPGA never goes above 45°C. Adding extra heatsink to FPGA had no effect past lowering the mesured temperature below 40°C.

Reading the devboard ERRATA, there is mention about JTAG functionality being impaired above 55°C - this sounds like some aspect of the design is marginal and some production units manifest the same problem even at lower temperatures.

Can you please elaborate on the errata and expected behaviour?

  • in reply to iksevas

    U23 translator even though rated for the solution doesn’t behave well as temperatures increase.

  • in reply to iksevas

    Thank you for confirming the problem being by design.

    I would suggest updating the errata to stating that the JTAG is not functional above 30°C, because that is the result we are getting with our board.

    What is the recommended path forward - should we RMA the board, or perform rework on brand new devkit to get it operational?

    Bott side E0,95top side thermal E0,95

  • in reply to iksevas

    Interesting - from your schematic the NVT2006  appears to be translating between 0.84V and 3.3V logic levels. The chip is now obsolete but was rated by NXP as being suitable for operation at no lower than 1.0V on the A port.

    I didn't look hard but I couldn't find a 6 bit level shifter that can do 0.8V to 3.3V !

    Rather makes you wonder why on earth AMD/Xilinx didn't put a level translator inf the FPGA on the JTAG port, and even more why Avnet didn't put the effort into a work around on the board.

    MK

  • in reply to michaelkellett

    That is VCCO for bank 0 and bank 84. Translator is performing 1.8V to 3.3V translation.

  • I’m seeing the exact same issue. Once the FPGA reaches around 45°C (Measured via SYSMON), the JTAG connection becomes unstable—Vivado keeps disconnecting and reconnecting, making any meaningful debugging practically impossible. I have used Vivado Lab Editions 2024.2 from Windows11  (Latest One).

    For context:

    • Ambient temperature is around 22°C.
    • A 120mm fan is actively cooling the entire board from top.
    • Despite these measures, the issue persists consistently under heavy load.
    • Clearly going to be more critical in the summer.

    What I see as a temporal solution is to reduce the design's power (IE keep DDR4 in reset) - This is not a viable solution for my application,as I do need to use this interface. I dont have a thermal camera to provide any images. I highly doubt that AVNET engineers did not see the same behavior during initial board evaluation (Unless they are working in a freezer).

  • in reply to Aenerine

    The JTAG flaw has been seen and has been documented in the errata on the AuBoard page. Unfortunately for the initial revision of that board it appears that there is not a good solution at higher temps to maintain that communication.

  • in reply to Aenerine

    You have to rework the board with proper level shifter and void the warranty, there is no way around it, then at least the JTAG is stable.

    Tria/Avnet did not even bother to respond to emails regarding this problem, seems like Chineese vendors now have considerable advantage in price, quality and level of technical support and documentation provided upfront.

    It is also bit misleading to say its problem of "just" first revision, when first revision is all that is being shipped to customers.

  • in reply to MkE

    What email address did you use where you didn't get a response from Avnet?

    As far as the first revision, that is all that is being shipped currently as the stock would need to be exhausted prior to getting to the next revision of the platform. Manufacturing hardware isn't a cheap endeavor. If this was your own product, what would you do with your existing inventory particularly for a development kit?

    Side bar: where you able to R&R the JTAG level shifter and get the results you desired?