Hello,
I'm an AMD dedicated FAE at Avnet. My customer recently purchased AUBoard 15P to begin prototyping an SFP+ solution. It appears that the 10G SFP+ clock needs to come from component U56. Quick summary of what I have figured out so far:
- U56 = Renesas 8T49N241-998NLGI
- U56 provides clock to quad 226 MGTREFCLK0 (HDMI_CLK_8T49N241_N/P)
- U56 has an I2C interface accessible by pins R22 (SDA) and R23 (SCL)
- U56 expects RST pin connected to G22 to be driven HIGH to be enabled
Is there a bring up and register write sequence we need to apply to U56 via the I2C connection to enable pass through instead of clock recovery, and program it to 156.25MHz for the SFP+ Module? Customer attempted to enable U56 by driving G22 reset pin high but did not see an output.
Is the EEPROM available to the HDMI subsystem (U37) already programmed? They did attempt to apply the clock configuration example design that configures U57 EEPROM to U37 by changing the I2C pinout from B9/A9 (U57/U58 I2C bus) to R22/R23 (HDMI I2C bus) and running the IDT Timing Commander Tool -> EEPROM configuration tool, hopefully this attempted write did not cause U37 EEPROM to become misconfigured. Is there a way to verify U37 is correctly programmed?
Are there any example designs available for this board that use the SFP+ module on quad 226?
Thanks!
Trevor
