Problem booting Linux.

I've gone through Chapter 6 of CTT (ug873) to integrate AXI CDMA with Zynq PS HP slave port. I'm aware that the guide is for ZC702 which has 1GB memory whereas Zedboard has 512MB memory.

I've successfully implemented the standalone application (baremetal application of section 6.2) and it works fine without any problem. But I'm having problem with the Linux OS example shown in section 6.3.

I generated FSBL and BOOT.bin by using SDK. Also, I used devicetree.dtb, u-boot.elf (to generate BOOT.bin), zImage and ramdisk8M.image.gz that come with ug873 user guide.

I then copied all the above files to the SD card and turned on Zedboard. But, there wasn't anything happened. There wasn't a single character printed on Tera Term. I guess Linux didn't boot at all.

My question is - do I have to change the devicetree.dtb in this case?

Thank you very much.

Parents

0 Former Member over 12 years ago

Thanks for all the suggestions. I tried to generate the device tree by Xilinx device tree generator. Then, I converted the dts file to dtb file by ./scripts/dtc/dtc.

Now, there are something shown on my Tera Term but there are all funny words like:

)u00E4u00FBexu00C8u00C83 K      +%
        Hu00E8
u00BDu00E61u00FBu00E1u00CCKe u00C4     )u00E9u00A0HW
                     ?H^u00CAzhHu00BAJ

I did make sure the baud rate of my Tera Term configured to 115200. These are my device tree dts file looks like:

/dts-v1/;
/ {
t#address-cells = <1>;
t#size-cells = <1>;
tcompatible = "xlnx,zynq-zc770", "xlnx,zynq-7000";
tmodel = "Xilinx Zynq";
taliases {
ttethernet0 = &ps7_ethernet_0;
ttserial0 = &ps7_uart_1;
t} ;
tchosen {
tt/*bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1";*/
ttbootargs = "console=ttyPS0,115200 root=/dev/ram rw initrd=0x800000,8M earlyprintk rootwait devtmpfs.mount=1";
ttlinux,stdout-path = "/axi@0/serial@e0001000";
t} ;
tcpus {
tt#address-cells = <1>;
tt#cpus = <0x2>;
tt#size-cells = <0>;
ttps7_cortexa9_0: cpu@0 {
tttcompatible = "xlnx,ps7-cortexa9-1.00.a";
tttd-cache-line-size = <0x20>;
tttd-cache-size = <0x8000>;
tttdevice_type = "cpu";
ttti-cache-line-size = <0x20>;
ttti-cache-size = <0x8000>;
tttmodel = "ps7_cortexa9,1.00.a";
tttreg = <0>;
tttxlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
tttxlnx,cpu-clk-freq-hz = <0x27bc86bf>;
tt} ;
ttps7_cortexa9_1: cpu@1 {
tttcompatible = "xlnx,ps7-cortexa9-1.00.a";
tttd-cache-line-size = <0x20>;
tttd-cache-size = <0x8000>;
tttdevice_type = "cpu";
ttti-cache-line-size = <0x20>;
ttti-cache-size = <0x8000>;
tttmodel = "ps7_cortexa9,1.00.a";
tttreg = <1>;
tttxlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
tttxlnx,cpu-clk-freq-hz = <0x27bc86bf>;
tt} ;
t} ;
tpmu {
ttcompatible = "arm,cortex-a9-pmu";
ttinterrupt-parent = <&ps7_scugic_0>;
ttinterrupts = < 0 5 4 0 6 4 >;
ttreg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
t} ;
tps7_ddr_0: memory@0 {
ttdevice_type = "memory";
ttreg = < 0x0 0x20000000 >;
t} ;
tps7_axi_interconnect_0: amba@0 {
tt#address-cells = <1>;
tt#size-cells = <1>;
ttcompatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ttranges ;
ttaxi_cdma_0: axicdma@80200000 {
ttt#address-cells = <1>;
ttt#size-cells = <1>;
tttcompatible = "xlnx,axi-cdma";
tttranges = < 0x80200000 0x80200000 0x10000 >;
tttreg = < 0x80200000 0x10000 >;
tttxlnx,include-sg = <0x0>;
tttdma-channel@80200000 {
ttttcompatible = "xlnx,axi-cdma-channel";
ttttinterrupt-parent = <&ps7_scugic_0>;
ttttinterrupts = < 0 59 4 >;
ttttxlnx,datawidth = <0x400>;
ttttxlnx,include-dre = <0x0>;
ttttxlnx,lite-mode = <0x0>;
ttttxlnx,max-burst-len = <0x100>;
ttt} ;
tt} ;
ttps7_ddrc_0: ps7-ddrc@f8006000 {
tttcompatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
tttreg = < 0xf8006000 0x1000 >;
tttxlnx,has-ecc = <0x0>;
tt} ;
ttps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
tttcompatible = "xlnx,ps7-dev-cfg-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 8 4 >;
tttreg = < 0xf8007000 0x1000 >;
tt} ;
ttps7_dma_s: ps7-dma@f8003000 {
ttt#dma-cells = <1>;
ttt#dma-channels = <8>;
ttt#dma-requests = <4>;
tttarm,primecell-periphid = <0x41330>;
tttcompatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
tttreg = < 0xf8003000 0x1000 >;
tt} ;
ttps7_ethernet_0: ps7-ethernet@e000b000 {
ttt#address-cells = <1>;
ttt#size-cells = <0>;
tttcompatible = "xlnx,ps7-ethernet-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 22 4 >;
tttlocal-mac-address = [ 00 0a 35 00 00 00 ];
tttphy-handle = <&phy0>;
tttphy-mode = "rgmii-id";
tttreg = < 0xe000b000 0x1000 >;
tttxlnx,enet-clk-freq-hz = <0x7735940>;
tttxlnx,enet-slcr-1000mbps-div0 = <0x8>;
tttxlnx,enet-slcr-1000mbps-div1 = <0x1>;
tttxlnx,enet-slcr-100mbps-div0 = <0x8>;
tttxlnx,enet-slcr-100mbps-div1 = <0x5>;
tttxlnx,enet-slcr-10mbps-div0 = <0x8>;
tttxlnx,enet-slcr-10mbps-div1 = <0x32>;
tttxlnx,eth-mode = <0x1>;
tttxlnx,has-mdio = <0x1>;
tttxlnx,ptp-enet-clock = <111111115>;
tttmdio {
tttt#address-cells = <1>;
tttt#size-cells = <0>;
ttttphy0: phy@7 {
tttttcompatible = "marvell,88e1116r";
tttttdevice_type = "ethernet-phy";
tttttreg = <7>;
tttt} ;
ttt} ;
tt} ;
ttps7_gpio_0: ps7-gpio@e000a000 {
ttt#gpio-cells = <2>;
tttcompatible = "xlnx,ps7-gpio-1.00.a";
tttemio-gpio-width = <1>;
tttgpio-controller ;
tttgpio-mask-high = <0xc0000>;
tttgpio-mask-low = <0xfe81>;
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 20 4 >;
tttreg = < 0xe000a000 0x1000 >;
tt} ;
ttps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
tttcompatible = "xlnx,ps7-iop-bus-config-1.00.a";
tttreg = < 0xe0200000 0x1000 >;
tt} ;
ttps7_pl310_0: ps7-pl310@f8f02000 {
tttarm,data-latency = < 3 2 2 >;
tttarm,tag-latency = < 2 2 2 >;
tttcache-level = < 2 >;
tttcache-unified ;
tttcompatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 2 4 >;
tttreg = < 0xf8f02000 0x1000 >;
tt} ;
ttps7_qspi_0: ps7-qspi@e000d000 {
tttbus-num = <0>;
tttcompatible = "xlnx,ps7-qspi-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 19 4 >;
tttis-dual = <0>;
tttnum-chip-select = <1>;
tttreg = < 0xe000d000 0x1000 >;
tttspeed-hz = <200000000>;
tttxlnx,fb-clk = <0x1>;
tttxlnx,qspi-clk-freq-hz = <0xbebc200>;
tttxlnx,qspi-mode = <0x0>;
tt} ;
ttps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
tttcompatible = "xlnx,ps7-qspi-linear-1.00.a";
tttreg = < 0xfc000000 0x1000000 >;
tttxlnx,qspi-clk-freq-hz = <0xe4e1c0>;
tt} ;
ttps7_ram_0: ps7-ram@0 {
tttcompatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
tttreg = < 0xfffc0000 0x40000 >;
tt} ;
ttps7_scugic_0: ps7-scugic@f8f01000 {
ttt#address-cells = < 2 >;
ttt#interrupt-cells = < 3 >;
ttt#size-cells = < 1 >;
tttcompatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
tttinterrupt-controller ;
tttlinux,phandle = < 0x1 >;
tttphandle = < 0x1 >;
tttreg = < 0xf8f01000 0x1000 0xf8f00100 0x100 >;
tt} ;
ttps7_scutimer_0: ps7-scutimer@f8f00600 {
tttcompatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 1 13 769 >;
tttreg = < 0xf8f00600 0x20 >;
tt} ;
ttps7_scuwdt_0: ps7-scuwdt@f8f00620 {
tttcompatible = "xlnx,ps7-scuwdt-1.00.a";
tttdevice_type = "watchdog";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 1 14 769 >;
tttreg = < 0xf8f00620 0xe0 >;
tt} ;
ttps7_sd_0: ps7-sdio@e0100000 {
tttclock-frequency = <50000000>;
tttcompatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 24 4 >;
tttreg = < 0xe0100000 0x1000 >;
tttxlnx,has-cd = <0x1>;
tttxlnx,has-power = <0x0>;
tttxlnx,has-wp = <0x1>;
tttxlnx,sdio-clk-freq-hz = <0x2faf080>;
tt} ;
ttps7_slcr_0: ps7-slcr@f8000000 {
tttcompatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
tttreg = < 0xf8000000 0x1000 >;
tttclocks {
tttt#address-cells = <1>;
tttt#size-cells = <0>;
ttttarmpll: armpll {
ttttt#clock-cells = <0>;
tttttclock-output-names = "armpll";
tttttclocks = <&ps_clk>;
tttttcompatible = "xlnx,zynq-pll";
tttttlockbit = <0>;
tttttreg = < 0x100 0x110 0x10c >;
tttt} ;
ttttddrpll: ddrpll {
ttttt#clock-cells = <0>;
tttttclock-output-names = "ddrpll";
tttttclocks = <&ps_clk>;
tttttcompatible = "xlnx,zynq-pll";
tttttlockbit = <1>;
tttttreg = < 0x104 0x114 0x10c >;
tttt} ;
ttttiopll: iopll {
ttttt#clock-cells = <0>;
tttttclock-output-names = "iopll";
tttttclocks = <&ps_clk>;
tttttcompatible = "xlnx,zynq-pll";
tttttlockbit = <2>;
tttttreg = < 0x108 0x118 0x10c >;
tttt} ;
ttttps_clk: ps_clk {
ttttt#clock-cells = <0>;
tttttclock-frequency = <33333333>;
tttttclock-output-names = "ps_clk";
tttttcompatible = "fixed-clock";
tttt} ;
ttt} ;
tt} ;
ttps7_uart_1: serial@e0001000 {
tttcompatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
tttcurrent-speed = <115200>;
tttdevice_type = "serial";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 50 4 >;
tttport-number = <0>;
tttreg = < 0xe0001000 0x1000 >;
tttxlnx,has-modem = <0x0>;
tttxlnx,uart-clk-freq-hz = <0x5f5e100>;
tt} ;
ttps7_usb_0: ps7-usb@e0002000 {
tttcompatible = "xlnx,ps7-usb-1.00.a";
tttdr_mode = "host";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 21 4 >;
tttphy_type = "ulpi";
tttreg = < 0xe0002000 0x1000 >;
tt} ;
ttps7_xadc: ps7-xadc@f8007100 {
tttcompatible = "xlnx,ps7-xadc-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 7 4 >;
tttreg = < 0xf8007100 0x20 >;
tt} ;
t} ;
} ;
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0 Former Member over 12 years ago

Thanks for all the suggestions. I tried to generate the device tree by Xilinx device tree generator. Then, I converted the dts file to dtb file by ./scripts/dtc/dtc.

Now, there are something shown on my Tera Term but there are all funny words like:

)u00E4u00FBexu00C8u00C83 K      +%
        Hu00E8
u00BDu00E61u00FBu00E1u00CCKe u00C4     )u00E9u00A0HW
                     ?H^u00CAzhHu00BAJ

I did make sure the baud rate of my Tera Term configured to 115200. These are my device tree dts file looks like:

/dts-v1/;
/ {
t#address-cells = <1>;
t#size-cells = <1>;
tcompatible = "xlnx,zynq-zc770", "xlnx,zynq-7000";
tmodel = "Xilinx Zynq";
taliases {
ttethernet0 = &ps7_ethernet_0;
ttserial0 = &ps7_uart_1;
t} ;
tchosen {
tt/*bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1";*/
ttbootargs = "console=ttyPS0,115200 root=/dev/ram rw initrd=0x800000,8M earlyprintk rootwait devtmpfs.mount=1";
ttlinux,stdout-path = "/axi@0/serial@e0001000";
t} ;
tcpus {
tt#address-cells = <1>;
tt#cpus = <0x2>;
tt#size-cells = <0>;
ttps7_cortexa9_0: cpu@0 {
tttcompatible = "xlnx,ps7-cortexa9-1.00.a";
tttd-cache-line-size = <0x20>;
tttd-cache-size = <0x8000>;
tttdevice_type = "cpu";
ttti-cache-line-size = <0x20>;
ttti-cache-size = <0x8000>;
tttmodel = "ps7_cortexa9,1.00.a";
tttreg = <0>;
tttxlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
tttxlnx,cpu-clk-freq-hz = <0x27bc86bf>;
tt} ;
ttps7_cortexa9_1: cpu@1 {
tttcompatible = "xlnx,ps7-cortexa9-1.00.a";
tttd-cache-line-size = <0x20>;
tttd-cache-size = <0x8000>;
tttdevice_type = "cpu";
ttti-cache-line-size = <0x20>;
ttti-cache-size = <0x8000>;
tttmodel = "ps7_cortexa9,1.00.a";
tttreg = <1>;
tttxlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
tttxlnx,cpu-clk-freq-hz = <0x27bc86bf>;
tt} ;
t} ;
tpmu {
ttcompatible = "arm,cortex-a9-pmu";
ttinterrupt-parent = <&ps7_scugic_0>;
ttinterrupts = < 0 5 4 0 6 4 >;
ttreg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
t} ;
tps7_ddr_0: memory@0 {
ttdevice_type = "memory";
ttreg = < 0x0 0x20000000 >;
t} ;
tps7_axi_interconnect_0: amba@0 {
tt#address-cells = <1>;
tt#size-cells = <1>;
ttcompatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ttranges ;
ttaxi_cdma_0: axicdma@80200000 {
ttt#address-cells = <1>;
ttt#size-cells = <1>;
tttcompatible = "xlnx,axi-cdma";
tttranges = < 0x80200000 0x80200000 0x10000 >;
tttreg = < 0x80200000 0x10000 >;
tttxlnx,include-sg = <0x0>;
tttdma-channel@80200000 {
ttttcompatible = "xlnx,axi-cdma-channel";
ttttinterrupt-parent = <&ps7_scugic_0>;
ttttinterrupts = < 0 59 4 >;
ttttxlnx,datawidth = <0x400>;
ttttxlnx,include-dre = <0x0>;
ttttxlnx,lite-mode = <0x0>;
ttttxlnx,max-burst-len = <0x100>;
ttt} ;
tt} ;
ttps7_ddrc_0: ps7-ddrc@f8006000 {
tttcompatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
tttreg = < 0xf8006000 0x1000 >;
tttxlnx,has-ecc = <0x0>;
tt} ;
ttps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
tttcompatible = "xlnx,ps7-dev-cfg-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 8 4 >;
tttreg = < 0xf8007000 0x1000 >;
tt} ;
ttps7_dma_s: ps7-dma@f8003000 {
ttt#dma-cells = <1>;
ttt#dma-channels = <8>;
ttt#dma-requests = <4>;
tttarm,primecell-periphid = <0x41330>;
tttcompatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
tttreg = < 0xf8003000 0x1000 >;
tt} ;
ttps7_ethernet_0: ps7-ethernet@e000b000 {
ttt#address-cells = <1>;
ttt#size-cells = <0>;
tttcompatible = "xlnx,ps7-ethernet-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 22 4 >;
tttlocal-mac-address = [ 00 0a 35 00 00 00 ];
tttphy-handle = <&phy0>;
tttphy-mode = "rgmii-id";
tttreg = < 0xe000b000 0x1000 >;
tttxlnx,enet-clk-freq-hz = <0x7735940>;
tttxlnx,enet-slcr-1000mbps-div0 = <0x8>;
tttxlnx,enet-slcr-1000mbps-div1 = <0x1>;
tttxlnx,enet-slcr-100mbps-div0 = <0x8>;
tttxlnx,enet-slcr-100mbps-div1 = <0x5>;
tttxlnx,enet-slcr-10mbps-div0 = <0x8>;
tttxlnx,enet-slcr-10mbps-div1 = <0x32>;
tttxlnx,eth-mode = <0x1>;
tttxlnx,has-mdio = <0x1>;
tttxlnx,ptp-enet-clock = <111111115>;
tttmdio {
tttt#address-cells = <1>;
tttt#size-cells = <0>;
ttttphy0: phy@7 {
tttttcompatible = "marvell,88e1116r";
tttttdevice_type = "ethernet-phy";
tttttreg = <7>;
tttt} ;
ttt} ;
tt} ;
ttps7_gpio_0: ps7-gpio@e000a000 {
ttt#gpio-cells = <2>;
tttcompatible = "xlnx,ps7-gpio-1.00.a";
tttemio-gpio-width = <1>;
tttgpio-controller ;
tttgpio-mask-high = <0xc0000>;
tttgpio-mask-low = <0xfe81>;
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 20 4 >;
tttreg = < 0xe000a000 0x1000 >;
tt} ;
ttps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
tttcompatible = "xlnx,ps7-iop-bus-config-1.00.a";
tttreg = < 0xe0200000 0x1000 >;
tt} ;
ttps7_pl310_0: ps7-pl310@f8f02000 {
tttarm,data-latency = < 3 2 2 >;
tttarm,tag-latency = < 2 2 2 >;
tttcache-level = < 2 >;
tttcache-unified ;
tttcompatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 2 4 >;
tttreg = < 0xf8f02000 0x1000 >;
tt} ;
ttps7_qspi_0: ps7-qspi@e000d000 {
tttbus-num = <0>;
tttcompatible = "xlnx,ps7-qspi-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 19 4 >;
tttis-dual = <0>;
tttnum-chip-select = <1>;
tttreg = < 0xe000d000 0x1000 >;
tttspeed-hz = <200000000>;
tttxlnx,fb-clk = <0x1>;
tttxlnx,qspi-clk-freq-hz = <0xbebc200>;
tttxlnx,qspi-mode = <0x0>;
tt} ;
ttps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
tttcompatible = "xlnx,ps7-qspi-linear-1.00.a";
tttreg = < 0xfc000000 0x1000000 >;
tttxlnx,qspi-clk-freq-hz = <0xe4e1c0>;
tt} ;
ttps7_ram_0: ps7-ram@0 {
tttcompatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
tttreg = < 0xfffc0000 0x40000 >;
tt} ;
ttps7_scugic_0: ps7-scugic@f8f01000 {
ttt#address-cells = < 2 >;
ttt#interrupt-cells = < 3 >;
ttt#size-cells = < 1 >;
tttcompatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
tttinterrupt-controller ;
tttlinux,phandle = < 0x1 >;
tttphandle = < 0x1 >;
tttreg = < 0xf8f01000 0x1000 0xf8f00100 0x100 >;
tt} ;
ttps7_scutimer_0: ps7-scutimer@f8f00600 {
tttcompatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 1 13 769 >;
tttreg = < 0xf8f00600 0x20 >;
tt} ;
ttps7_scuwdt_0: ps7-scuwdt@f8f00620 {
tttcompatible = "xlnx,ps7-scuwdt-1.00.a";
tttdevice_type = "watchdog";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 1 14 769 >;
tttreg = < 0xf8f00620 0xe0 >;
tt} ;
ttps7_sd_0: ps7-sdio@e0100000 {
tttclock-frequency = <50000000>;
tttcompatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 24 4 >;
tttreg = < 0xe0100000 0x1000 >;
tttxlnx,has-cd = <0x1>;
tttxlnx,has-power = <0x0>;
tttxlnx,has-wp = <0x1>;
tttxlnx,sdio-clk-freq-hz = <0x2faf080>;
tt} ;
ttps7_slcr_0: ps7-slcr@f8000000 {
tttcompatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
tttreg = < 0xf8000000 0x1000 >;
tttclocks {
tttt#address-cells = <1>;
tttt#size-cells = <0>;
ttttarmpll: armpll {
ttttt#clock-cells = <0>;
tttttclock-output-names = "armpll";
tttttclocks = <&ps_clk>;
tttttcompatible = "xlnx,zynq-pll";
tttttlockbit = <0>;
tttttreg = < 0x100 0x110 0x10c >;
tttt} ;
ttttddrpll: ddrpll {
ttttt#clock-cells = <0>;
tttttclock-output-names = "ddrpll";
tttttclocks = <&ps_clk>;
tttttcompatible = "xlnx,zynq-pll";
tttttlockbit = <1>;
tttttreg = < 0x104 0x114 0x10c >;
tttt} ;
ttttiopll: iopll {
ttttt#clock-cells = <0>;
tttttclock-output-names = "iopll";
tttttclocks = <&ps_clk>;
tttttcompatible = "xlnx,zynq-pll";
tttttlockbit = <2>;
tttttreg = < 0x108 0x118 0x10c >;
tttt} ;
ttttps_clk: ps_clk {
ttttt#clock-cells = <0>;
tttttclock-frequency = <33333333>;
tttttclock-output-names = "ps_clk";
tttttcompatible = "fixed-clock";
tttt} ;
ttt} ;
tt} ;
ttps7_uart_1: serial@e0001000 {
tttcompatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
tttcurrent-speed = <115200>;
tttdevice_type = "serial";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 50 4 >;
tttport-number = <0>;
tttreg = < 0xe0001000 0x1000 >;
tttxlnx,has-modem = <0x0>;
tttxlnx,uart-clk-freq-hz = <0x5f5e100>;
tt} ;
ttps7_usb_0: ps7-usb@e0002000 {
tttcompatible = "xlnx,ps7-usb-1.00.a";
tttdr_mode = "host";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 21 4 >;
tttphy_type = "ulpi";
tttreg = < 0xe0002000 0x1000 >;
tt} ;
ttps7_xadc: ps7-xadc@f8007100 {
tttcompatible = "xlnx,ps7-xadc-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = < 0 7 4 >;
tttreg = < 0xf8007100 0x20 >;
tt} ;
t} ;
} ;
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