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MaaXBoard-RT: PinMux, 2nd SPI, other features

tjaekel

I was checking the headers J1 and J15, if I could have a 2nd SPI:
I want to implement "my" DualSPIder approach: one SPI master Tx, one SPI slave RX.
So, I have checked the header signals, pins and possible alternatives.

image

Figure 1: The AVNET J1 pin table (with corrections)

PinMux_Alternatives

Figure 2: The pin names and possible (potential, not all) alternatives for the signals:
bold and green - what is configured on my project

QUESTION:
What is this GPIO2_IO15 as "GPIO/CTS"?
There is not a GPIO2 (just a GPIO_MUX2_IO15) and LPUART1_CTS is on a different pin.

What are the default features (signals)?

  • 2x I2C
  • 2x UART
  • 1s SPI
  • 1x SAI, bi-directional (but just as SAI Master)

plus on J15:

  • 1x CAN
  • 1x I2C

I have not listed here PWMs or ADC signals.

How to have a 2nd SPI?

A second SPI is possible, if you use the pins for LPUART1.
This is actually the Debug UART (the 3-pin header for the MCU-LINK).
But you can make it free and route the Debug UART, e.g. as LPUART6 (or even LPUART2 possible),
just change FW and connect MCU-LINK on other pins, to make LPUART1 free (as 2nd SPI).

So, a second SPI is available if you use another Debug UART.

What other features would be possible?

Based on the Alternatives for the pins - here what else could be configured and be available:

  • SAI3_MCLK : the master clock for PCM (if needed):
    BUT! the SAI3_RX_SYNC is not available. So, you can run the PCM as bi-directional) but just as Master.
    A PCM Slave is not possible!
  • SPDIF_OUT
  • SPDIF_IN
  • PDM with PDM_CLK and PDM_DATA0 (e.g. for an external PDM MIC) (on J15)
  • maybe two additional CAN (on J15)
  • or, maybe, another UART (on J15)
  • some more PWMs

  • BTW: I have checked J1 header pins against Raspberry Pi (RPi HAT) signals.
    Almost OK, except:

    The SPI_MOSI and SPI_MISO look also flipped!:
    The name in row as "Possible HAT Pin Function" is correct with RPi HAT, but MaaXBoard-RT has it flipped (SDI is MISO, SDO is MOSI).
    I would be suspicious if SPI works on RPi HAT with MaaxBoard-RT (or you can flip in SW the MISO and MOSI - not sure?).
    All other OK, at a first glance.

    Remark

    When you see on J1 header pin table stuff like "GPCLK0" or "PWM0" - it is the signal name on Raspberry Pi (RPi HAT), not MaaxBoard-RT signal.
    For instance: "PWM0" (as RPi HAT) is "FLEXPWM3_PWMX2" (on MaaxBoard-RT. So, if so, driven as PWM3).
    (the RPi HAT names are not the same as on MaaxBoard-RT real signals or not providing the "same" feature, like GPCLK0)

    So far, it looks OK (besides the SPI).
    And on RPi is not a "CTS" signal (for UART).

    So, still unclear what this pin J1, pin 36, is really on MaaxBoard-RT.

  • in reply to tjaekel

    Pin 36 of the J1 header  is connected to GPIO_EMC_B2_05 on the RT1176 

    image

  • in reply to peterfenn

    Hi peterfenn,

    where do you get this piece of schematics?
    May I get the full schematics as well?

    BTW:
    Yes, the pin is GPIO_EMC_B2_05 - but it is GPIO8_IO15 (8, not 2!) or GPIO2_MUX_IO15.

    It means: there is NOT a signal "GPIO2_IO15"
    (and it cannot, because GPIO2 and GPIO3 are tightly coupled GPIOs, as CM7_GPIO...,
    There are not GPIO2 and GPIO3: as regular it would be 8 or 9, but 2 is only CM7_GPIO_...).

    Could it be that the original schematics (you referring to), is a bit "wrong"?

    Best regards
    Torsten

  • Here the final pinmux table I want to use...
    Bear in mind: I have verified the pin functions (before I would start my own PCB design...).
    e.g. pin J1, p36, is "GPIO8_IO15" or "GPIO_MUX2_IO15" --> as CM7_GPIO2...

    Maaxboard-RT-pinmux