I have developed a vhdl file that writes data inside the DDR3. I don't have the AXI BFM licence so I simulated my AXI interface with a BRAM controller that provides an AXI slave interface and it works.
Then I connect my design to AXI HP0 of the Processing system (I delete previous BRAM controller). My problem is that no data is written inside the DDR3 when I verify it by doing a memory dump with SDK.
Do anyone have idea or a reference design or a guide or a source code that works to write data burst correctly inside the DDR3 through the PL?