Net lengths and clocking pins

Hi,

I am designing a carrier board for microzed that will interface an ADC. It has an 8 wire LVDS interface and timing is quite critical.

I am trying to confirm which pins on the JX headers correspond to the MRCC and SRCC capable pairs. The pinout in the Altium librtary does not explicitly specify...

I have found the spreadsheet with the net lengths which is great, but can I confirm that for example:

JX1_LVDS_11_P connects to IO_L11P_T1_SRCC_35 on the chip.

Many thanks in advance!

Ben.

0 Former Member over 9 years ago

Actually JX1_LVDS_11_P is connected to IO_L12P_T1_MRCC_34 (Zynq package pin U18).
( I know, the MicroZed JX LVDS pair numbers do not match up with the Xilinx signal pair number names ).

You can verify this using the MicroZed Schematic and/or the MicroZed Master XDC file (generated from the netlist), both found here:

http://zedboard.org/support/documentation/1519

-Gary
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0 Former Member over 9 years ago

Yikes, thanks for the fast reply! you may have saved me from embarrassment.
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