I'm having trouble getting SPI to behave as desired. Very much a noob here so, be gentle.
The ports I wish to use for SPI via LVDS are located on the breakout carrier card.
The data being sent is via SPI with an accompanying GPIO pin that determines which "side" of the data is being sent.
Once both sides of the data is received, it's then packaged and sent via UDP through the ethernet port.
Inside Vivado, I cannot choose which ports are used for the SPI.
Is this done within the SDK? I would prefer that the FPGA side of things handles the SPI and the Arm merely handles the UDP package.
Within Vivado, I have the SPI_0 activated in the ZYNQ7 Processing System. (But no inputs to the module?)
I seem to have some fundamental design flow issues wrong and I'm wondering if someone has a link to an SPI tutorial on the Zynq.
Logically, I assume I can just map the GPIOs to a custom IP that handles the SPI and output it to DRAM and handle it in C... I think.
Thanks in advance for the help. I've recently started learning FPGA development and any direction here would be greatly appreciated!