I have a MicroZed SoC and a carrier card. I am trying to program a simple phase accumulator in Verilog (using Xilinx Vivado 2018.1), assign the variables to the contraint file through the "elaborated design" and IO planning, and load the bitstream onto the FPGA. I know that the 100 IOs on the microheader are unavailable unless you connect them to the carrier card. I have done so.
I am using a 5V wall adapter to power the carrier card. I have the jumpers on the carrier card set to 1.8 V (same voltage as the IOSTANDARD in the constraint file), and the jumpers on the microzed are set to JTAG mode. I am able to load the bitstream successfully onto the microZed when the microzed is powered through the carrier board, and the microzed is attached to the JTAG programming port (J3); however, I am unable to get any voltage reading from the corresponding pins on the carrier card.
Any help would be appreciated.
Thanks,
Matthew
Hello,
