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MicroZed Hardware Design MBCC Vadj with Microzed 7010 - conflicting rails
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  • phy
  • microzed
  • soc
  • ethernet
  • zynq-7000
Related

MBCC Vadj with Microzed 7010 - conflicting rails

rwong1231
rwong1231 over 1 year ago

Hi everyone,

 

I looking for some clarification as to the possibility of a damaged board or if its within specs:

 

My 7010 SOC is attached to the Microzed FMC MBCC carrier card. Bank 34 and  35 is supplied with VADJ that is jumpered to 1.8V.

Without the SOC or anything attached to the carrier, the test point for VADJ (jumpered for 1V8) measures 1.802V - which is correct.


However, once I plug in the SOC, it measures to be approximately 2.3-5V. The other test points (5V0 and 3V3, MAX15066) measure correctly.

This happens also for our other 7010 and 7020 boards + MBCC - from stock.

 

My question is the following (above note is for reference in case its relevant):

For my ADC, it sends out a differential signal biased at 2.5V into the inputs of the 7010 SOC (Vmax amplitude is 2.9V). this would mean the highest signal amplitude that

goes into Bank 35 would be 2.9V (well below the 7010 HR bank max of 3.6V). However, since I've set Bank 34 and Bank 35 to be 1.8V (from the jumper on VADJ), is it possible that by sending in a signal above 1.8V  into Bank 34/35, I've damaged the SOC? Even though the Xilinx DS187, states a max HR for VCCO of 3.465V?

 

 

 

Thank you.
Regards,

Ron.

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  • ctammann
    0 ctammann over 1 year ago

    Hey Ron,

     

    The short answer is that you may indeed be damaging the device. Typically the max I/O voltage is set by Vcco + "x" with x being a nominal voltage above that reference. There are some caveats, especially with differential signalling though. It sounds like the scenario you are describing would violate the I/O voltage limits. You may want to check out the 7 series IO resource guide though - https://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf

     

    Specifically table 1-55 has some info on specific I/O standards. Reading through it I do believe you are violating the spec, but it's probably worth you taking a look as well. Please let me know if you interpret things differently but I believe your scenario is out of spec and may damage the device.
    Thanks
    Chris

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  • ctammann
    0 ctammann over 1 year ago

    Hey Ron,

     

    The short answer is that you may indeed be damaging the device. Typically the max I/O voltage is set by Vcco + "x" with x being a nominal voltage above that reference. There are some caveats, especially with differential signalling though. It sounds like the scenario you are describing would violate the I/O voltage limits. You may want to check out the 7 series IO resource guide though - https://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf

     

    Specifically table 1-55 has some info on specific I/O standards. Reading through it I do believe you are violating the spec, but it's probably worth you taking a look as well. Please let me know if you interpret things differently but I believe your scenario is out of spec and may damage the device.
    Thanks
    Chris

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