Hello all,
Is there any updated tutorials on how to get started with the MiniZed using the latest tools from Xilinx?
All I have found is old information and it's a real pain trying to figure out how this all works...
Thanks
Hello all,
Is there any updated tutorials on how to get started with the MiniZed using the latest tools from Xilinx?
All I have found is old information and it's a real pain trying to figure out how this all works...
Thanks
Hello again,
Not sure if this is a dead forum or people just don't want to help.... :-(
I have been able to get a basic "hello world" example working with Vivado/Vitis 2010.1.
I have had to bail with trying to get it working in Linux. The tools don't seem very stable in Ubuntu. They will work for a while then things start going bonkers. I'll have to figure that out later when I start trying to figure out Petalinux. For now I am running Vivado/Vitis in Windows 10 (not my preference but its at least working).
I'm now trying to figure out the GPIO stuff with a standalone system.
I added the AXI interconnect and AXI GPIO blocks to control the PL_LED_R and PL_LED_G outputs and read the PL_SW input to the Vivado design. I have created a Vitis project and can toggle the LEDs and read the switch. (Major pain trying to find the information on the web to do this.)
Now I'm trying to also control the PS_LED_R and PS_LED_G outputs and read the PS_PB input. (Again major pain trying to find the necessary info...)
I can read the input but have not been able to control the outputs. I'm not sure what I am missing.
In the Vivado design, so the PS MIO pins need to be made external and connected? I didn't do that with the PS_PB input and can read it with not problems. But the two outputs never change.
Right now I have this in the Vitis code:
XGpioPs mio;
XGpioPs_Config *cfg = XGpioPs_LookupConfig(XPAR_GPIO_0_DEVICE_ID);
XGpioPs_CfgInitialize(&mio, cfg, cfg->BaseAddr);
XGpioPs_SetDirectionPin(&mio, 0, 1); // PS_PB (MIO0) is an input
XGpioPs_SetDirectionPin(&mio, 52, 0); // PS_LED_R (MIO52) is an output
XGpioPs_SetDirectionPin(&mio, 53, 0); // PS_LED_G (MIO53) is an output
XGpioPs_SetOutputEnablePin(&mio, 52, 1);
XGpioPs_SetOutputEnablePin(&mio, 53, 1);
This this reads the input:
XGpioPs_ReadPin(&mio, 0);
And, I think, this should set the outputs:
XGpioPs_WritePin(&mio, 52, 0); // set PS_LED_R low (LED off)
XGpioPs_WritePin(&mio, 52, 1); // set PS_LED_R high (LED on)
Am I missing something?
Thanks
In general, getting started with Vivado IP block design there are many tools. You can also watch/download the recent webinar content from Arty-s7 FPGA boards.
The normal flow is that you design a block design in Vivado and upload the bitstream to the board, then you go with Vitis to create an application and code to do something.
You are right that with Ubuntu it was a pain to run Vivado, that's what I have written in my recent blog(Arty-s7 FPGA board) comments.
Avnet has hardware, software, and training courses for the MiniZed board. Though targeted to a recent version of the Xilinx tools, they may be very helpful for you to learn what you are trying to do:
You may also want to take a look at the latest PetaLinux 2020.1 BSP for the MiniZed. In this BSP the bi-color LED is tied to the microphone (any sensing of audio input changes the LED to red).
http://avnet.me/zedsupport then navigate to 2020.1 -> BSP
The Xilinx Vivado, Vitis, and PetaLinux tools run well on Ubuntu, but are finicky about the exact version being used. It is important to match the Xilinx tools to a known good, supported version of the host OS (Ubuntu). It is best to download and install a supported Ubuntu version and stay on that version (do not let Ubuntu update/upgrade). More information about supported Ubuntu versions for the 2020.1 Xilinx tools is in Xilinx UG973:
Also, Avnet publishes a VirtualBox VM Install Guide to aid users in their Ubuntu setup to run the Xilinx tools:
--Tom
Hi, have you checked this?
https://www.hackster.io/workshops/minized
Gustavo,
I was not aware of the workshop. Thanks for the link.
The only issue with it is that the workshop appears to be based on 2019.1. I really would like to figure this out with the latest tools (2020.1).
Thanks
Progress... (Other than still running the Windows tools, still can't get the Linux tools to work reliably in Linux (Ubuntu VM).)
I have been successfully able to:
1) Create a 2010.1 Vivado/Vitis "Hello World" design for the MiniZed board. The main issue is remembering to change the stdin/stdout to ps7_uart_1 to match the hardware.
2) Create a design to toggle the PS LEDs and read the PS button on the MiniZed.
3) Create a design to toggle the PS and PL LEDs and read the PS button the PL switch on the MiniZed using AXI GPIO interfaces to the PL LEDs and switch.
4) Create a design with a simple 16-bit hardware multiplier as a custom IP AXI slave peripheral.
Now I'm trying to figure out how to make a more advanced Custom IP AXI slave peripheral.
What I would like is a AXI slave peripheral with 4 registers that are:
Register 0 - Writes to a FIFO, reads from same FIFO
Register 1 - Writes to a second FIFO, reads from same FIFO
Register 2 - Writes to a register that sets the PL LEDs, reads the PL LED state
Register 3 - Writes do nothing, reads the PL switch
But, I'm not sure what needs to be done in the Custom IP stuff to create and hookup the FIFOs or how to connect the LEDs and switch.
Any pointers?
Thanks
We have now posted the 2020.1 PetaLinux BSPs for all the various boards. Even though you aren't interested in PetaLinux at this point, you can still use the scripted flow that we provide to rebuild the default design, which may be a good starting point.
The 2020.1 release is documented here:
Updated Designed By Avnet BSP & Platforms for v2020.1 tools, the 1 command to rule them all edition!
Then you can follow these instructions, but you can limit what you run to the hardware build.
Avnet HDL git HOWTO (Vivado 2020.1 and earlier)
Bryan
Hello Bryan,
I gave up trying to get a stable Ubuntu VM running. I purchased a NUC and just installed Ubuntu on it. I now have Ubuntu 18.04.4 installed and the Xilinx 2020.2 tools.
With that setup I have had great success running Vivado/Vitis and have created a couple standalone examples from on the web. Everything seems to be going good.
I'm now trying the figure out PetaLinix but of course am running into problems.
I followed the Avnet HDL git HOWTO you referenced but since the BSPs are based on 2020.1 they are not working quite right.
The PetaLinux build succeeds and I the generated Vivado design opens and appears ok. I can JTAG boot the MiniZed using the 'xsdb boot_jtag_INITRD_MINIMAL.tcl' command. But when I try to boot from QSPI with 'sh boot_qspi_INITRD.sh' I get the following error:
[ERROR] : section avnet_qspi.scr.0 offset of 0xFC0000 overlaps with prior section end address of 4A921C0
My guess is that the INITRD is to large for the QSPI.
What do I need to do to modify the PetaLinux build so reduce the size of the INITRD?
Or, do you have any idea when the Avnet BSP and Platforms will be updated to work with 2020.2?
Thanks,
Hartley
It looks like you need to change the offsets in the petalinux-config. I will also run this by our Petalinux experts to see if they have different advice.
We are working on the 2020.2 BSPs now, but a couple issues were identified with the Ultra96-V2 Wi-Fi in 2020.1, so we are fixing those first. I expect we will have the 2020.2 BSPs done by the end of January (hopefully!). It always takes us a month or two after Xilinx releases new tools, and that assumes there aren't any problems. The 2020.1 release introduced a slew of issues that took us more time to correct. Our initial look at 2020.2 suggests that this update will be much simpler, so we are optimistic we can get it done quicker this time.
It looks like both 2020.1 and 2020.2 are compatible with Ubuntu 18.04.4, so you could install the 2020.1 tools and get comfortable with that first, which will give us time to work on 2020.2.
Bryan