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pmods in minized board files

sgawad

Hello all,

 

I am trying to add Pmods to my board diagram.

I wonder why they don't show up in the "Board" tab.

I do see the 2 leds (pl_led_r and pl_led_g)

as well as (pl_sw_1bit) 

But the pmod ports don't show up. (Although they maybe should based on the digilent tutorial I follow for an other board)

Also I run the tcl for the speedway but after it's done (successfully) when I go to project settings the project device is not a board but rather just the chip. Is that intended?

 

Thank you in advance and sorry to ask those naive questions.

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  • 0

    Hello Sgawad,

    To connect to the Pmods you just have to write your contraints properly and configure your block diagram to output what protocol you wish to use. The boards tab will not have anything labeled Pmod in it.

    --Josh

  • 0 in reply to jafoste4

    Thank you Josh,

    I was specifically following the walkthrough below in section 3.2:

    https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start

    I will do as you say, but can you please briefly explain why digilent has their pmods listed in the board tab and what the pro/cons are to have that vs manually edited ones as you suggest?

    Still following your advice, I am now considering the constraints file which I get when I run  "source make_minized_petalinux.tcl"

    namely "minized_petalinux.xdc"

    which does seems to contain pin name for the arduino ports, I2C, wireless and mic (almost everything except pmod...:)

    I am a bit worried though, because although the scripts ends and does seems to produce a bitstream, which I am later able to import in sdx it does so with 52 "critical warnings" and 1000+ warnings

    the critical ones seem to be mostly related to the constraint file and I haven't yet started to add my own constraints.

    I have tried with both the master branch and the  minized_petalinux_MINIZED_20170810_010906  to the same result, should I be worried?

    I had the minized board files added.

    the TCL console is full of :
      WARNING: [Constraints 18-550] Could not create 'SLEW' constraint because net 'minized_petalinux_i/wireless_mgr_0/SDIO_CMD_dir' is not directly connected to top level port. 'SLEW' is ignored by Vivado but preserved for implementation tool. [/home/user/Documents/hdl/Projects/minized_petalinux/MINIZED/minized_petalinux.runs/impl_1/.Xil/Vivado-19892-user-VirtualBox/dcp4/minized_petalinux_wireless_mgr_0_0.edf:415]
      etc....
       
      and the messages contains:
     
    Synthesis (2 critical warnings)
     Out-of-Context Module Runs 
       minized_petalinux
         minized_petalinux_wireless_mgr_0_0_synth_1
              [Synth 8-5799] Converted tricell instance 'U0i_0' to logic
              [Synth 8-5799] Converted tricell instance 'U0i_1' to logic
     
    Implementation (50 critical warnings)
            Design Initialization
               [Common 17-55] 'set_property' expects at least one object. ["/home/user/Documents/hdl/Projects/minized_petalinux/minized_petalinux.xdc":70]
               and then 49 times [Common 17-55] 'set_property' expects at least one object. ["/home/user/Documents/hdl/Projects/minized_petalinux/minized_petalinux.xdc":71]
     
    Thank you again,
     
    Shady
     
Reply
  • 0 in reply to jafoste4

    Thank you Josh,

    I was specifically following the walkthrough below in section 3.2:

    https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start

    I will do as you say, but can you please briefly explain why digilent has their pmods listed in the board tab and what the pro/cons are to have that vs manually edited ones as you suggest?

    Still following your advice, I am now considering the constraints file which I get when I run  "source make_minized_petalinux.tcl"

    namely "minized_petalinux.xdc"

    which does seems to contain pin name for the arduino ports, I2C, wireless and mic (almost everything except pmod...:)

    I am a bit worried though, because although the scripts ends and does seems to produce a bitstream, which I am later able to import in sdx it does so with 52 "critical warnings" and 1000+ warnings

    the critical ones seem to be mostly related to the constraint file and I haven't yet started to add my own constraints.

    I have tried with both the master branch and the  minized_petalinux_MINIZED_20170810_010906  to the same result, should I be worried?

    I had the minized board files added.

    the TCL console is full of :
      WARNING: [Constraints 18-550] Could not create 'SLEW' constraint because net 'minized_petalinux_i/wireless_mgr_0/SDIO_CMD_dir' is not directly connected to top level port. 'SLEW' is ignored by Vivado but preserved for implementation tool. [/home/user/Documents/hdl/Projects/minized_petalinux/MINIZED/minized_petalinux.runs/impl_1/.Xil/Vivado-19892-user-VirtualBox/dcp4/minized_petalinux_wireless_mgr_0_0.edf:415]
      etc....
       
      and the messages contains:
     
    Synthesis (2 critical warnings)
     Out-of-Context Module Runs 
       minized_petalinux
         minized_petalinux_wireless_mgr_0_0_synth_1
              [Synth 8-5799] Converted tricell instance 'U0i_0' to logic
              [Synth 8-5799] Converted tricell instance 'U0i_1' to logic
     
    Implementation (50 critical warnings)
            Design Initialization
               [Common 17-55] 'set_property' expects at least one object. ["/home/user/Documents/hdl/Projects/minized_petalinux/minized_petalinux.xdc":70]
               and then 49 times [Common 17-55] 'set_property' expects at least one object. ["/home/user/Documents/hdl/Projects/minized_petalinux/minized_petalinux.xdc":71]
     
    Thank you again,
     
    Shady
     
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