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PicoZed Hardware Design PicoZed bare-metal eMMC CSD register ECC field setting?
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  • bare-metal
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PicoZed bare-metal eMMC CSD register ECC field setting?

nygren
nygren over 3 years ago

I'm using a PicoZed 7015 with Xilinx SDK 2018.3 in a bare-metal application. Everything works reading and writing to the eMMC with the default setting of ECC disabled. I have a high reliability application in mind and I'm wondering what would happen if I changed the ECC field in the eMMC's CSD register from the default no ECC to the optional BCH(542,512) ECC encoding. Would I still be able to read/write to the eMMC normally with the eMMC internally protecting the contents with ECC at the cost of reduced memory capacity, or would a special driver on the host be needed to encode/decode ECC reads/writes?

I wasn't able to find a definitive answer to this question, so I thought I would just try to set the ECC field to BCH encoding and see what would happen.

What I believe I need to do is read the eMMC CSD register using CMD9, keep the CSD contents the same except for my change, write the CSD contents with my change back to the eMMC CSD register using CMD27 (after computing a new CSD CRC7 field?) and then re-read the eMMC CSD register with another CMD9 to confirm my changes actually made it in.

I have not been able to get this process to work. One of the problems I have is when I try to go from the eMMC Transfer State (trans) back to the Standby State (stby) to execute another CMD9 to re-read the CSD register and confirm I have the ECC field updated, the CMD7 I execute with a Relative Card Address of 0x0000 that's supposed to send me back to the Standby State (stby) fails with a timeout.

As a sanity check, I tried just reading the CSD register with CMD9, issuing a CMD7 with the assigned RCA to move to the Transfer State (trans) and immediately move back to the Standby State (stby), but that fails with a timeout just like before. The figure below (from the JESD84-B50 JEDEC eMMC standard that the 8GB Micron MTFC8GAKAJCN-4M IT on the PicoZed BOM says it complies with) shows the sanity check I tried to perform:

image

So I must be missing something fundamental on how to get back to Standby State (stby). If anyone out there is knowledgeable about eMMC state machine programming, please give me a few pointers. Thanks for your time.

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  • nygren
    0 nygren over 3 years ago

    FYI, I've been told that

    1) Changing the eMMC ECC field doesn't do anything except let someone know that you have encoded the data yourself in BCH format.

    2) The eMMC spec JESD84-B50 I am working from is wrong and a CMD7 with a RCA of 0x0000 (i.e. moving back from tran to stby state) will not have an R1 or R1b response. No response will be generated, which explains why I was timing out waiting for a response.

    If anyone can confirm this information, please let me know.

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  • jafoste4
    0 jafoste4 over 3 years ago in reply to nygren

    Hello,

    Unfortunatly we don't have much experiencing in regards to leveraging ECC support. I would reccomend you also ask this question over at the AMD-Xilinx forum to reach a broader audience https://support.xilinx.com/s/?language=en_US 

    -Josh

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  • nygren
    0 nygren over 3 years ago in reply to jafoste4

    The Xilinx support site you mentioned hasn't been any better than a message in a bottle for me.

    However I will say I have received responses to bugs filed against Xilinx drivers at their GitHub site https://github.com/Xilinx/embeddedsw/ .

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  • jafoste4
    0 jafoste4 over 3 years ago in reply to nygren

    I can look into this a big.

    Are you looking for the eMMC to do the ECC function support or the Zynq device?

    -Josh

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  • nygren
    0 nygren over 3 years ago in reply to jafoste4

    I thought if it was as simple as setting the ECC field in the eMMC's CSD register (i.e. having the eMMC support ECC on its own), I'd give it a try.

    Right now it looks like setting that bit doesn't do anything, plus it is difficult to set that bit. The Zynq's sdps driver doesn't currently support going from tran -> stby with a CMD7 and RCA of 0x0000 (though Xilinx has told me how to hack the driver to do it) and I think you have to compute a new CRC7 in order to re-write the CSD. So it seems to be a major production to set a bit that doesn't do anything.

    So if I want to do this, I think I have to have the Zynq encode the data I want to write in an ECC code (I'm thinking about Golay encoding it) and decoding it when I read the data back. That's different major effort.

    If you're interested in writing ECC encoded data to eMMCs also, let me know. It's just a side project I've been thinking about tackling.

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  • jafoste4
    0 jafoste4 over 3 years ago in reply to nygren

    Are you certtain that ECC is supported by the eMMC device on the PicoZed? I haven't opened the datasheet for it at this time. I know typically thats an extra feature that is chosen or not chosen during component selection.

    -Josh

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  • jafoste4
    0 jafoste4 over 3 years ago in reply to jafoste4

    Nevermind, I can confirm it does have ECC support 

    image

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  • nygren
    0 nygren over 3 years ago in reply to jafoste4

    Right, the datasheet does have that field per the eMMC spec JESD84-B50 (Is there a later spec that that?)

    But I think that field is just a flag that really doesn't do any internal BCH encoding/decoding.

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  • nygren
    0 nygren over 3 years ago in reply to nygren

    What I ended up doing was Golay encoding / decoding the data written to / read from the eMMC. I saw no reason to set the two bit ECC field from the default. As mentioned above setting it is hard to do and does not serve a purpose (for me at least).

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  • nygren
    0 nygren over 3 years ago in reply to nygren

    What I ended up doing was Golay encoding / decoding the data written to / read from the eMMC. I saw no reason to set the two bit ECC field from the default. As mentioned above setting it is hard to do and does not serve a purpose (for me at least).

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