Hi,
I'm making a custom carrier for the PicoZed SDR, which will connect an external clock to the AD9361. Looking at the clock input circuit in the SOM schematics (pg. 8), I'm unsure what the proper way is to drive this. The AD9361 datasheet says it wants a max 1.3Vpp clock, AC coupled. It looks like when using the internal oscillator, it uses a capacitive divider with a series 18pF and using the ~7pF "on" capacitance of the switch and the ~10pF capacitance of the AD9361 input to drop the 1.8V oscillator down to ~0.9Vpp.
But for the external input, there's a 50 ohm termination resistor, and no AC coupling capacitor after it. How do you recommend driving this? Should that resistor (R5) be removed, and use a capacitive divider for my external clock? If I provide an AC coupled signal that can drive 50 ohms, I believe the signal will be clipped by swinging below the rail of the switch (U5), and the resistor will also provide a 50 ohm DC path to ground from the XTALN input.
I also see that the development kit terminates at the SMA with 50 ohms and no AC coupling capacitor... which is essentially in parallel with the existing 50 ohms, making the clock input 25 ohm terminated when mated to the development kit.
Am I missing something, or is this an error that should be changed on a future rev? And if so, what change would you expect to make? Of course I'd like to design my carrier to be compatible with future revs without requiring additional modifications.
Thanks,
Pat
