AXI in ZYNQ

Hi,

I am doing interface between ps to pl in ZYNQ processor. I need some clarifications on interface.
1. what is the frequency of AXI4 clock frequency.
2. for interface have 3 ways like (GPIO, ACP), I need some technical document to use the methods in vivado 2014.1.

Thanks & Regards
Ashwak ali S.

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0 Former Member over 10 years ago

Hi,

have any reference document about PS to PL communication on vivado 2013.4 version please send to me.

Thanks & Regards
Ashwak ali S.
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0 Former Member over 10 years ago in reply to Former Member

I am not sure what documentation you are asking for that has not already been referenced above, except perhaps the Zynq TRM (Technical Reference Manual) ug58a5 which details the hardware specific details of the Zynq PS to PL interfaces: http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf

Otherwise the most pertinent documents on Zynq architecture, tutorials and debug references are listed above.

Could you be more specific in exactly what you are looking for that is not available on the Xilinx website?

-Gary
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0 Former Member over 10 years ago in reply to Former Member

I am not sure what documentation you are asking for that has not already been referenced above, except perhaps the Zynq TRM (Technical Reference Manual) ug58a5 which details the hardware specific details of the Zynq PS to PL interfaces: http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf

Otherwise the most pertinent documents on Zynq architecture, tutorials and debug references are listed above.

Could you be more specific in exactly what you are looking for that is not available on the Xilinx website?

-Gary
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