Actions
Forum Thread Details
  • State Verified Answer
  • Replies 2 replies
  • Subscribers 279 subscribers
  • Views 324 views
  • Users 0 members are here
Related

Hardware Float on the R5 (ultrazed)

tobinhall

How can the compiler (armr5-none-eabi-gcc) be configured to use the hard floating point coprocessor?

 

I've tried 

-mfloat-abi=hard

-mfpu=vfpv3-d16

-mthumb

but I get undefined instruction exceptions 

the BSP seems to disable hard floating point with:

 -mfloat-abi=soft
 -mfpu=vfpv3-d16
 
in the "standalone" Makefile Why?  I was able to get around this and recompile by eliminating the offending lines and put the desired options in "extra_compiler_flags"
 
I have tried -mfloat-abi=softfp which runs, but is still too slow for me.
 
I've also tried to selectively compile with -mfloat-abi=hard , but it appears that the linker wants everything the same way.
 
thanks,
 
Tobin.
  • 0

    it seems that the bsp has the FPU disabled by default.  this would seem to partially explain why the bsp does not support the VFP and why the compile switches were the way they were.  Leaving the FPU enabled in boot.s seemed to fix my problem.

    Is there a "proper" way to do this?

    in Boot.s

    /* enable fpu access  */
    vmrs r3, FPEXC
    orr r1, r3, #(1<<30)
    vmsr FPEXC, r1
     
    /* clear the floating point register*/
    mov r1,#0
    vmov d0,r1,r1
    vmov d1,r1,r1
    vmov d2,r1,r1
    vmov d3,r1,r1
    vmov d4,r1,r1
    vmov d5,r1,r1
    vmov d6,r1,r1
    vmov d7,r1,r1
    vmov d8,r1,r1
    vmov d9,r1,r1
    vmov d10,r1,r1
    vmov d11,r1,r1
    vmov d12,r1,r1
    vmov d13,r1,r1
    vmov d14,r1,r1
    vmov d15,r1,r1
     
    /* restore previous value for fpu access */
    // vmsr FPEXC,r3
  • 0

    Hello Tobinhall,

    Please ask this question over at the Xilinx forum as it is more based on their tools and newest silicon. They are the best equipped to handle it.

    https://forums.xilinx.com/

    Thanks,

    Josh