How can the compiler (armr5-none-eabi-gcc) be configured to use the hard floating point coprocessor?
I've tried
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
but I get undefined instruction exceptions
the BSP seems to disable hard floating point with:
How can the compiler (armr5-none-eabi-gcc) be configured to use the hard floating point coprocessor?
I've tried
-mfloat-abi=hard
-mfpu=vfpv3-d16
-mthumb
but I get undefined instruction exceptions
the BSP seems to disable hard floating point with:
it seems that the bsp has the FPU disabled by default. this would seem to partially explain why the bsp does not support the VFP and why the compile switches were the way they were. Leaving the FPU enabled in boot.s seemed to fix my problem.
Is there a "proper" way to do this?
in Boot.s
it seems that the bsp has the FPU disabled by default. this would seem to partially explain why the bsp does not support the VFP and why the compile switches were the way they were. Leaving the FPU enabled in boot.s seemed to fix my problem.
Is there a "proper" way to do this?
in Boot.s