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LwIP Example UART problem

Former Member

Hi,

I'm new to the ZedBoard and currently I'm trying to run the LwIP examples,
provided by Xilinx, on the Board.
(XAPP1026)

I have connected the USB-JTAG and USB-UART to my host machine.
A Serial Terminal has been configured as always for the ZedBoard.

An Ethernet cable is connecting the ZedBoard and the host machine. The host machine IP configuration is identical to the recommended values in the example.

The Boot Mode Jumper are: PLL Used, JTAG Boot, Cascaded JTAG: MIO[6:2] = 00000.

I've set up the SDK-Project according to the manual, and ran the Software as explained. Hoever, no Serial Terminal output is provided.

There are two things that are not mentioned in the manual, and thus could be the
source of the Problem:
The "fsbl" Project displays an error:

make: *** No rule for Target u00BBC:/PROJECT_FOR_RELEASE/zc702_GigE/HW/project_1/project_1.sdk/design_1_wrapper_hw_platform_0/ps7_init.cu00AB,

The SKD-log displays a warn:

13:57:03 WARNt:  [Hsi 55-1559] Software Design already exists with Name C:PROJECT_FOR_RELEASEzc702_GigEHWproject_1project_1.sdkraw_apps_bspsystem.mss

Has anyone experienced something similar?





Parents
  • 0

    Thanks for Link,
    but I am still stuck. I created a new SDK workspace, where I
    added the Repository and imported the Project. But they all fail with
    an error, and I cannot generate the BSP-Resources, because the
    system.mss file can not be found.

    15:57:02 ERRORt: Failed to generate BSP due to invalid mss path

    also

    15:57:02 WARNt:  [Hsi 55-1484] MSS file doesn't have NAME. So assuming NAME as system
    15:57:02 ERRORt:  [Hsi 55-1594] Core gpio of version 3.00.a not found in repositories

    I assume, that there is Problem with the PL-build somehow.
    I have Vivado 2014.3 running on my System, is there
    ans possibility that I can rebuild and export he PL?

Reply
  • 0

    Thanks for Link,
    but I am still stuck. I created a new SDK workspace, where I
    added the Repository and imported the Project. But they all fail with
    an error, and I cannot generate the BSP-Resources, because the
    system.mss file can not be found.

    15:57:02 ERRORt: Failed to generate BSP due to invalid mss path

    also

    15:57:02 WARNt:  [Hsi 55-1484] MSS file doesn't have NAME. So assuming NAME as system
    15:57:02 ERRORt:  [Hsi 55-1594] Core gpio of version 3.00.a not found in repositories

    I assume, that there is Problem with the PL-build somehow.
    I have Vivado 2014.3 running on my System, is there
    ans possibility that I can rebuild and export he PL?

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