VGA on Zedboard

Hi all, I am a fan of the Zedboard. And fortunately I got one.

But I found it was difficulty for me to play this board.

I just want how to control the VGA under the linux attached in the Zedboard.

I saw a VGA demo on the Zedboard that can showed a Digilent logo through VGA. And I knew that this demo was implemented through the PL only.

I want to know if I can control the VGA using the C program language under the Linux porting in the Zedboard and how I can done this.

And did anyone know how the demos were implemented? Could I get the source project files about these demos?

And were there any other forums that contained the projects about Zedboard? Cause I found there was very few information about on the Internet.

I am appreciative for any information.

0 Former Member over 12 years ago

VGA port on Zedboard can only be controlled from the PL logic. To control the VGA port you will need an AXI bus master controller that generate VGA scan signal from DDR memory.
To control the VGA display controller from Linux, a frame buffer device driver is needed to drive the display device.
Xylon has a display controller solution for Zynq chip.
And here is some information about creating a simple Vedio generator on FPGA: http://www.fpga4fun.com/PongGame.html
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0 Former Member over 12 years ago in reply to Former Member

I think the easiest way is to create framebuffer by using AXI connections. Meaby need some line buffer.
VGA is only 8bit so 800x600 takes about 470 kB so this can be stored to DDR. Slave AXI can take Framebuffer address and use master AXI to read framebuffer from DDR.

Then you only need to write drivers for linux and configure to X using it or use direct memory access to that area.
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0 Former Member over 12 years ago in reply to Former Member

Thanks for your reply!

One more question.
In the Technical Reference Manual, I found "Configure MIO pin 46 for the RxD signal . Write 0x0000_12E1 to the slcr.MIO_PIN_46 register".

I just wanted to know why the 0x0000_12E1 corresponds to the RxD singal. I searched the characters "0x0000_12E1" in the TRM file, but no results returned. So these must no be any information about the mapping relationships between the IO singal and its vaules, such as the RxD singal correspondding to the "0x0000_12E1".

So where can I find the IO signal mapping relationshios?
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0 Former Member over 12 years ago in reply to Former Member

parallelcell,

Would you mind posting this question as a separate thread? It has nothing to do with your original question, and prevents the community from seeing it.

Thanks!
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0 Former Member over 12 years ago in reply to Former Member

ok
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0 Former Member over 12 years ago

I want to implement a system to display on VGA certain images. Can you suggest me a tutorial or a place where to start?

someone managed to make a module for VGA display or a tutorial how to accomplish this?

thank you
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0 Former Member over 11 years ago in reply to Former Member

If you got something, please consider sharing it !
Thanks,
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0 Former Member over 11 years ago

If you want to learn how to create VGA IP my suggestion not for you, but if you just want to connect monitor to Zed or microZed you can use DisplayLink USB Video adaptor connected to USB OTG port.

http://blog.idv-tech.com/2014/03/10/the-easiest-way-to-add-screen-to-zedboard/

Best regards.
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0 drhatch over 7 years ago

I posted a project to github that might be useful. It implements the VGA output using pure Verilog RTL (no ARM processor is used). The project contains a dual-port block memory for the screen buffer, and the code for creating the VGA waveform.
The data your Verilog code writes into Port A of the dual port RAM shows up on the screen.
https://github.com/delhatch/Zedboard_Mandel
I hope this code helps.
Del
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0 taktik02 over 7 years ago in reply to drhatch

Hi, i'm actually working on a VGA project for Zedboard. How can I use your project to control VGA through C code in Xilinx? Thanks!
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